SLVSGY2 October   2023 TPS2HCS10-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
    1. 5.1 Recommended Connections for Unused Pins
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protection Mechanisms
        1. 8.3.1.1 Programmable Fuse Protection
        2. 8.3.1.2 Thermal Shutdown
        3. 8.3.1.3 Overcurrent Protection And Capacitive Load Charging
        4. 8.3.1.4 Reverse Battery
      2. 8.3.2 Diagnostic Mechanisms
        1. 8.3.2.1 VOUT Short-to-Battery and Open-Load
          1. 8.3.2.1.1 Detection With Channel Output (FET) Enabled
          2. 8.3.2.1.2 Detection With Channel Output Disabled
        2. 8.3.2.2 Digital Current Sense Output
          1. 8.3.2.2.1 RSNS Value and Accuracy / Resolution of Current Measurement
            1. 8.3.2.2.1.1 High Accuracy Load Current Sense
            2. 8.3.2.2.1.2 SNS Output Filter
        3. 8.3.2.3 Output Voltage and FET Temperature Sensing
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 SLEEP
      3. 8.4.3 CONFIG/ACTIVE
      4. 8.4.4 Battery Supply Input (VBB) Under-voltage
      5. 8.4.5 LOW POWER MODE (LPM) State
      6. 8.4.6 LIMP HOME state
      7. 8.4.7 SPI Mode Operation
    5. 8.5 TPS2HC10S Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Thermal Considerations
        2. 9.2.2.2 Configuring the Capacitive Charging Mode
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Maximum continuous supply voltage, VVBB 28 V
Load dump voltage ISO16750-2:2010(E) 36 V
Maximum transient voltage on VBB pin, (example during ISO 7637 pulse 2a transient) VBBt 54 V
VOUT  voltage –30 VVS+0.3 V
Reverse polarity voltage, continuous on VBB pin –18 V
Low voltage supply pin voltage, VDD –0.3 5.5 V
Digital input pin voltages, VDIG SDI, SDO, SCLK, CS –0.3 5.5 V
Sense pin voltage, VSNS –0.3 5.5 V
FLT pin voltage, VFLT –0.3 5.5 V
Limp home activation pin voltage, VLHI VBB V
Limp home direct input pin voltages, VDI –0.3 5.5 V
Reverse ground current, IGND VBB < 0 V –50 mA
Maximum junction temperature, TJ 150 °C
Storage temperature, Tstg –65 150 °C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum
Ratings do not imply functional operation of the device at these or any other conditions beyond those listed
under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within
the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability,
functionality, performance, and shorten the device lifetime.