SNVSCN9A September   2024  – December 2024 TPS3423 , TPS3424

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Inputs
        1. 7.3.1.1 Push-Button Input (PB)
        2. 7.3.1.2 Push-Button Timing Programmability
        3. 7.3.1.3 KILL
      2. 7.3.2 Outputs
        1. 7.3.2.1 Interrupt (INT)
        2. 7.3.2.2 RESET / RESET
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Power Button Control with TPS3424
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 PB and RESET Topology
          2. 8.2.1.2.2 Short Press Time (tSP) and Long Press Time (tLP) selection
          3. 8.2.1.2.3 Interrupt and Kill Feature
        3. 8.2.1.3 Application Curve
      2. 8.2.2 High Voltage Connection
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2.2 RESET / RESET

RESET output of the device supports multiple configurations as described in Table 7-2. This device is available in all combination as described in Section 4.

Table 7-2 Reset Configurations
PARAMETER VALUE
Latching option Latched, Non-latched
Logic Active High (AH), Active Low (AL)
Output configuration Open Drain (OD), Push-Pull (PP)

RESET is asserted for short press and de-asserted for long press on PB pin for latched version as shown in Figure 6-1. Pulling KILL pin low also de-asserts the RESET in latched version as described in Figure 6-5. Non-latched RESET helps in achieving complex logic function with push-button. Non-latched RESET version of device supports multiple pattern as described in Section 4. RESET pattern is always different for short press and long press. One of the non-latched RESET pattern is shown in Figure 6-4.