SLVSGF1A october   2022  – june 2023 TPS3436-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Timing Diagrams
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Window Watchdog Timer
        1. 8.3.1.1 tWC (Close Window) Timer
        2. 8.3.1.2 tWO (Open Window) Timer
        3. 8.3.1.3 Watchdog Enable Disable Operation
        4. 8.3.1.4 tSD Watchdog Start Up Delay
        5. 8.3.1.5 SET Pin Behavior
      2. 8.3.2 Manual RESET
      3. 8.3.3 WDO Output
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Assert Delay
        1. 9.1.1.1 Factory-Programmed Output Assert Delay Timing
        2. 9.1.1.2 Adjustable Capacitor Timing
      2. 9.1.2 Watchdog Window Functionality
        1. 9.1.2.1 Factory-Programmed Timing Options
        2. 9.1.2.2 Adjustable Capacitor Timing
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1: Monitoring a Microcontroller Watchdog During Operational and Sleep Modes
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Determining Window Timings During Operation and Sleep Modes
          2. 9.2.1.2.2 Meeting the Output Assert Delay
          3. 9.2.1.2.3 Calculating the WDO Pullup Resistor
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20210630-CA0I-6SG0-FQHM-FVKDXKWRWJCF-low.svgFigure 6-1 Pin Configuration Option A
DDF Package, 8-Pin SOT-23,
TPS3436-Q1 Top View
GUID-20210630-CA0I-RFBF-MFKM-1QBWRWNFXRFM-low.svgFigure 6-3 Pin Configuration Option C
DDF Package, 8-Pin SOT-23,
TPS3436-Q1 Top View
GUID-20210630-CA0I-JJVM-RDRQ-CS9QJCDH2PV8-low.svgFigure 6-2 Pin Configuration Option B
DDF Package, 8-Pin SOT-23,
TPS3436-Q1 Top View
Table 6-1 Pin Functions
PIN NAME PIN NUMBER I/O DESCRIPTION
PINOUT A PINOUT B PINOUT C
CRST 3 3 — I Programmable WDO assert time pin. Connect a capacitor between this pin and GND to program the WDO assert time period. See Section 8.3.3 for more details.
CWD 2 2 — I Programmable watchdog timeout input. Watchdog close time is set by connecting a capacitor between this pin and ground. See Section 8.3.1.1 for more details.
GND 4 4 4 — Ground pin
MR 1 — 2 I Manual reset pin. A logic low on this pin asserts the WDO output. See Section 8.3.2 for more details.
WDO 7 7 7 O Watchdog output. Connect WDO to VDD using pull up resistance when using open drain output. WDO is asserted when a watchdog error occurs or MR pin is driven LOW. See Section 8.3.3 for more details.
SET0 5 1 1 I Logic input. SET0, SET1, and WD-EN pins select the watchdog window ratios and enable-disable the watchdog; see Section 8.3.1.5 for more details.
SET1 — 5 5 I Logic input. SET0, SET1, and WD-EN pins select the watchdog window ratios and enable-disable the watchdog; see Section 8.3.1.5 for more details.
VDD 8 8 8 I Supply voltage pin. For noisy systems, connecting a 0.1-µF bypass capacitor is recommended.
WD-EN — — 6 I Logic input. Logic high input enables the watchdog monitoring feature. See Section 8.3.1.3 for more details.
WDI 6 6 3 I Watchdog input. A falling transition (edge) must occur at this pin during the open window in order for WDO to not assert. See Section 8.3.1 for more details.