SLVSGF1A october   2022  – june 2023 TPS3436-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Timing Diagrams
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Window Watchdog Timer
        1. 8.3.1.1 tWC (Close Window) Timer
        2. 8.3.1.2 tWO (Open Window) Timer
        3. 8.3.1.3 Watchdog Enable Disable Operation
        4. 8.3.1.4 tSD Watchdog Start Up Delay
        5. 8.3.1.5 SET Pin Behavior
      2. 8.3.2 Manual RESET
      3. 8.3.3 WDO Output
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Assert Delay
        1. 9.1.1.1 Factory-Programmed Output Assert Delay Timing
        2. 9.1.1.2 Adjustable Capacitor Timing
      2. 9.1.2 Watchdog Window Functionality
        1. 9.1.2.1 Factory-Programmed Timing Options
        2. 9.1.2.2 Adjustable Capacitor Timing
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1: Monitoring a Microcontroller Watchdog During Operational and Sleep Modes
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Determining Window Timings During Operation and Sleep Modes
          2. 9.2.1.2.2 Meeting the Output Assert Delay
          3. 9.2.1.2.3 Calculating the WDO Pullup Resistor
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Window Watchdog Timer

The TPS3436-Q1 offers high precision window watchdog timer monitoring. The device is available in multiple pinout options A to C which support multiple features to meet ever expanding needs of various applications. Ensure a correct pinout is selected to meet the application needs.

The window watchdog is active when the VDD voltage is higher than the VDDMIN, MR voltage is held higher than 0.7 x VDD and watchdog is enabled. TPS3436-Q1 family offers various startup time delay options to ensure enough time is available for the host to complete boot operation. Please refer Section 8.3.1.4 section for additional details.

The window watchdog timer frame consists of two windows namely close window (tWC) followed by open window (tWO). The device monitors the WDI pin for falling edge. User is expected to provide a valid falling edge on WDI pin in the open window. Refer Section 5 to arrive at the relevant close window and open window values needed for application. The timer value is reset when a valid falling edge is detected on WDI pin in the tWO time duration. An early fault is reported if a WDI falling edge is detected in close window. A late fault is reported if WDI falling edge is not detected in both close and open window. The device asserts WDO output for time tWDO in event of watchdog fault. Refer Section 8.3.3 to arrive at the relevant tWDO value needed for application.

Figure 8-4 shows the basic operation for window watchdog timer operation. The TPS3436-Q1 watchdog functionality supports multiple features. Details are available in following sub sections.

GUID-20220629-SS0I-9ZWV-QZXG-VV922JHTQVZJ-low.svg Figure 8-4 Window Watchdog Timer Operation