SLVS165N April 1998 – July 2022 TPS3820 , TPS3823 , TPS3824 , TPS3825 , TPS3828
PRODUCTION DATA
The TPS3820, TPS3823, TPS3824, and TPS3828 devices have a watchdog timer that must be periodically triggered by either a positive or negative transition at WDI to avoid a reset signal being issued. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, ttout, RESET becomes active for the time period td. This event also reinitializes the watchdog timer.
The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it is in a high-impedance state, the TPS3820, TPS3823, TPS3824, or TPS3828 will generate its own WDI pulse to ensure that RESET does not assert. If this behavior is not desired, place a 1-kΩ resistor from WDI to ground. This resistor will help ensure that the TPS3820, TPS3823, TPS3824, or TPS3828 detects that WDI is not in a high-impedance state.
In applications where the input to the WDI pin is active (transitioning high and low) and the TPS3820, TPS3823, TPS3824, or TPS3828 is asserting RESET, RESET is stuck at a logic low after the input voltage returns above VIT–. If the application requires that input to WDI be active when the reset signal is asserted, then either the A version of the device or a FET should be used to decouple the WDI signal. The A version does not latch the reset signal to the asserted state if a WDI pulse is received while RESET is asserted. An external FET decouples the WDI signal by disconnecting the WDI input when RESET is asserted. For more details on this, see Decoupling WDI During Reset Event. The A version of the device does not require this FET, but it does operate in circuits that have it. Therefore, the A version is backwards-compatible with the non-A versions.