SLUS593J December   2003  – June 2022 TPS40054 , TPS40055 , TPS40057

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Setting the Switching Frequency (Programming the Clock Oscillator)
      2. 7.3.2 Programming The Ramp Generator Circuit
      3. 7.3.3 UVLO Operation
      4. 7.3.4 BP5 and BP10 Internal Voltage Regulators
      5. 7.3.5 Programming Soft Start
      6. 7.3.6 Programming Current Limit
      7. 7.3.7 Synchronizing to an External Supply
      8. 7.3.8 Loop Compensation
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Selecting the Inductor Value
      2. 8.1.2 Calculating the Output Capacitance
      3. 8.1.3 Calculating the Boost and BP10 Bypass Capacitor
      4. 8.1.4 DV-DT Induced Turn-On
      5. 8.1.5 High-Side MOSFET Power Dissipation
      6. 8.1.6 Synchronous Rectifier MOSFET Power Dissipation
      7. 8.1.7 TPS4005x Power Dissipation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Calculate Maximum and Minimum Duty Cycles
        2. 8.2.2.2  Select Switching Frequency
        3. 8.2.2.3  Select ΔI
        4. 8.2.2.4  Calculate the High-Side MOSFET Power Losses
        5. 8.2.2.5  Calculate Synchronous Rectifier Losses
        6. 8.2.2.6  Calculate the Inductor Value
        7. 8.2.2.7  Set the Switching Frequency
        8. 8.2.2.8  Program the Ramp Generator Circuit
        9. 8.2.2.9  Calculate the Output Capacitance (CO)
        10. 8.2.2.10 Calculate the Soft-Start Capacitor (CSS/SD)
        11. 8.2.2.11 Calculate the Current Limit Resistor (RILIM)
        12. 8.2.2.12 Calculate Loop Compensation Values
        13. 8.2.2.13 Calculate the Boost and BP10V Bypass Capacitance
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 MOSFET Packaging
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Programming Soft Start

The TPS4005x uses a closed-loop soft-start system to ensure a controlled ramp of the output during start-up. The reference voltage used for the start-up is derived in the following manner. A capacitor (CSS/SD) is connected to the SS/SD pin. There is a ramped voltage generated at this pin by charging CSS/SD with a current source. A value of 0.85 V is subtracted from the voltage at the SS/SSD pin and is applied to a non-inverting input of the error amplifier. This is the effective soft-start ramp voltage, VSSRMP. The error amplifier also has the 0.7-V reference (VFB) voltage applied to a non-inverting input. The structure of the error amplifier input stage is such that the lower of VFB or VSSRMP becomes the dominant voltage that the error amplifier uses to regulate the FB pin. This provides a clean, closed-loop start-up while VSSRMP is lower than VFB and a precision reference regulated supply as VSSRMP climbs above VFB. To ensure a controlled ramp-up of the output voltage, the soft-start time must be greater than the L-CO time constant as described in Equation 5.

Equation 5. GUID-2210B6FE-9C30-49F3-A337-16D03AD3A9F6-low.gif

where

  • tSTART is the start-up ramp time in s.

There is a direct correlation between tSTART and the input current required during start-up. The faster tSTART, the higher the input current required during start-up. This relationship is described in more detail in the Programming the Current Limit section. The soft-start capacitance, CSS/SD, is described in Equation 6.

For applications in which the VIN supply ramps up slowly (typically between 50 ms and 100 ms), it can be necessary to increase the soft-start time to between approximately 2 ms and 5 ms to prevent nuisance UVLO tripping. The soft-start time must be longer than the time that the VIN supply transitions between 6 V and 7 V.

Equation 6. GUID-1C4D6F59-02F5-41D1-A7F3-DC3D0E4E7855-low.gif

where

  • ISS/SD is the soft-start charge current (typical value is 2.35 μA).
  • VFB is the feedback reference voltage (typical value is 0.7 V).