Table 62. Design Parameters

8.2.1.1.1 Design Example List of Materials

Table 63 lists of materials for the 12-V Input, 1.2-V Output, 20-A (maximum) Output Current Converter design.

8.2.1.2.1 Selecting a Switching Frequency

This design example is calculated for a switching frequency of 300 kHz to improve efficiency. The switching frequency can be changed with the Fusion GUI, but some components may need to be revised at other switching frequencies.

8.2.1.2.2 Output Inductor, L_OUT

The output inductor value is determined by the peak-to-peak ripple at high line, and in this case a value of 30% of output current maximum is used.

Equation 36.

For this design a 750-nH inductor from Pulse (PG0077.801) was selected. The actual ripple current should now be recalculated using the actual inductance value.

Equation 37.

With this ripple current, the inductor RMS and peak current values can be calculated.

The RMS value of a zero-average triangular wave is given by Equation 38.

Equation 38.

At maximum load and maximum line, the peak inductor current is given by Equation 39.

Equation 39.

The DCR of the selected inductor (from the data sheet) is 1.2 mΩ. Inductor conduction losses are described in Equation 40.

Equation 40.

8.2.1.2.3 Output Capacitance, C_OUT

The selection of the output capacitor is typically affected by the output transient response requirement. Equation 41 and Equation 42 can be used to over-estimate the voltage deviation to account for delays in the loop bandwidth and can be used to determine the required output capacitance. The estimate of C_OUT based on overshoot is shown in Equation 41.

Equation 41.

The estimate of C_OUT based on undershoot is shown in Equation 42.

Equation 42.

When V_IN(min) > 2 x V_OUT, use the overshoot equation (V_Overshoot) to calculate minimum output capacitance.
When V_IN(min) < 2 x V_OUT use the undershoot equation (V_Undershoot). In this design example, V_IN(min) is much larger than 2 x V_OUT so Equation 43 is used to determine the required minimum output capacitance.

Equation 43.

8.2.1.2.4 The Resistive Component of Output Ripple

With a minimum capacitance, the maximum allowable ESR is determined by the maximum ripple voltage and is approximated by Equation 44.

Equation 44.

The factor of 8 in the equation above results from the calculation of capacitor voltage resulting from a triangular current. For this design, a 680-µF, 45-mΩ ESR, 5-nH ESL tantalum and two, 47-µF, 3-mΩ ESR, 0.9-nH ESL ceramic capacitors were selected for a total capacitance of 780 µF.

8.2.1.2.5 Peak Current Rating of the Inductor

With the output capacitance known, it is possible to calculate the charge current during start-up and determine the minimum saturation current rating for the inductor. The start-up charging current is shown in Equation 45 and the resulting peak inductor current is shown in Equation 46 .

Equation 45.

Equation 46.

8.2.1.2.6 Input Capacitance, C_IN

The input capacitor is selected to limit the input ripple voltage to 20% or less of V_IN. The ripple voltage is due to the current flowing in the input capacitor’s ESR as well as capacitance charging and discharging. To simplify the calculations, an infinitely large series input inductance is assumed. With an infinite inductor, the input capacitor current is calculated to be 5.6 Arms.

For reasons of availability, consider the capacitor EEVFC1E331P, which is an electrolytic, 330-µF, 25-V capacitor with 150-mΩ of ESR and 100-nH ESL. This capacitor has an rms current rating of 670 mA. With the calculated rms value of the capacitor current of 5.6 Arms, this implies that needs to be additional capacitance with a much lower ESR across the input bus in order to divert most of the AC current to this low ESR capacitor.

Another readily available capacitor is selected. A 22-µF, ceramic, 25-V, 10-mΩ ESR, 0.9-nH ESL device, two in parallel. With these capacitors in parallel, the ripple in the electrolytic is well within its rating with a value of 329 mA_rms.

8.2.1.2.7 Switching MOSFETs, Q_HS and Q_LS

The high-side and low-side MOSFETs, Q_HS and Q_LS, are selected based on several factors including:

• Vds, the drain to source voltage rating. This design requires a 25-V device
• Vgs, the gate to source voltage rating. For the TPS40400 device this voltage is 6.5 V
• Conduction losses, based on I²×R_DS(on)
• Gate charge, must be low enough to be driven by the PWM controller

These devices are selected:

Because the selected MOSFETs are switch very quickly, the device is programmed to have the shorter dead-time of 25 ns.

8.2.1.2.8 Device Addressing, R_ADDR0 and R_ADDR1

The PMBus address for the device must be read from the ADDR0 and ADDR1 pins. Each pin has an internal fixed current source and the resulting developed voltage is read and converted to the desired device address. The external resistors R_ADDR0 and R_ADDR1 from the address pins to ground set eight possible states for a total of 64 possible addresses. The address states are determined by voltages on the address pins per Table 65.

For this design, the address of 34 octal, or 28 decimal is selected arbitrarily. In order to achieve this address, the ADDR0 resistor R5 would be 54.9 kΩ and the ADDR1 resistor R4 would be 36.5 kΩ.

8.2.1.2.9 Current Sense Flter, R16 and C17

Current sensing for the TPS40400 device is typically done by sensing the voltage drop across the output inductor’s (L1) DC resistance. In order to do this, the large AC switching voltage forced across L1 must be filtered out so that the measured voltage is only the DC drop. This is done by placing an R-C filter directly across the output choke (high-frequency filter) L1. The R-C combination is chosen such that it provides enough filtering for the application and the time constant is chosen to match that of the output inductor and its ESR, which is shown in Equation 47.

Equation 47.

Usually a capacitor value is chosen between 10 nF and 1 µF for this location. A value of 100 nF is arbitrarily chosen, which yields Equation 48.

Equation 48.

Choose a standard value of 6.19 kΩ.

The capacitor C17 should be placed as close to the ISNS+ and ISNS– pins as possible to provide good bypass filtering. R16 should be placed close to the inductor to prevent traces with the switch node voltage from being propagated across the PCB and getting close to sensitive pins of the TPS40400 device.

8.2.1.2.10 Voltage Decoupling Capacitors, C_BP3, C_BP6, and C_VDD

Three pins on the TPS40400 device have DC bias voltages. It is necessary to add small decoupling capacitors to these pins. Table 66 shows the recommended minimum values.

8.2.1.2.11 Bootstrap Capacitor, C9

Selection of the bootstrap capacitor is based on the total gate charge of the high-side MOSFET and the allowable ripple on the BOOT pin. A ripple of 0.2 V is chosen as maximum for this design. This yields a value described in Equation 49.

Equation 49.

Choose a standard value of 100 nF. Additionally, a series resistor R9 is added in order to reducing the turn-on speed of the high-side MOSFET, Q1.

8.2.1.2.12 Snubber R12 and C16

For this design, the snubber function is designed based on an allowable snubber power dissipation. A target value of between 0.25% and 0.5% of the rated output power (P_OUT) is used as the starting point for the calculation of the snubber values. Once the snubber values are determined and real hardware is obtained, the snubber values can be adjusted to achieve better results.

Equation 50.

Equation 51.

Equation 52.

8.2.1.2.13 Loop Compensaton Components

Using the Texas Instruments SwitcherPro™ design tool and the resulting plant (system) bode plot, a crossover frequency of 20 kHz is selected with 45° of phase margin. The resulting compensation components are listed in Table 67.

8.2.1.2.14 Output Voltage Set Point, R_BIAS

The output voltage can be set by choosing and calculating R1 and R_BIAS. The V_OUT set point is shown in Equation 53.

Equation 53.

In this design R1 was chosen to be 10 kΩ. R_BIAS is calculated to be 10 kΩ.

8.2.1.2.15 Remote Sensing

Remote sensing can be accomplished with the differential amplifier as shown in Figure 22. Resistors RS1 and RS2 (R7 and R18 in the schematic above) are used if the sense connections fail or get damaged. The values of RS1 and RS2 are bound by an upper value such that the voltage drop across them does not introduce appreciable voltage regulation error from the bias current, and a lower value such that the voltage drop in the load wires which appears across these resistors does not dissipate appreciable power. Values between 10 Ω to 50 Ω are usually chosen.

Figure 22. Remote Sense Function

Table 68. Electrical Parameters

8.2.2.1.1 List of Materials

Table 69 lists the materials for Design Example 2.