SLUSAQ4 Data sheet

SLUSAQ4G October 2011 – September 2022 TPS40422

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

RSB|40
- MPQF185C
RHA|40
- MPQF135D

Thermal pad, mechanical data (Package|Pins)

Orderable Information

9.2.1.2.6 Step 5: Snubber Circuit Design

The purpose of the snubber network is to damp the high frequency ringing on the switch node and reduce the peak voltage stress on the low-side FET. A quick and efficient way to design a snubber network is to base it off the allowable power budget to be dissipated. A best practice is to target power dissipation in the output snubber between 0.25% and 0.5% of total power. Normally, the R-C time constant is designed to be short enough such that the capacitor is fully charged or discharged before the next switching edge. In this case, the power dissipation in the snubber resistor is determined only by the capacitor value and independent of the resistor value.

Equation 27.

where

peak voltage stored on the capacitors between pulse edges
t_S is the period
f_SW is the switching frequency
C_S is the snubber capacitor

The power budget is 1.2 V × 20 A × 0.25% = 60 mW and because the switching frequency is 500 kHz with peak voltage of 14 V, the calculated effective snubber capacitor is 612pF. In this example, to make sure that the ringing is critically damped, a practical value is chosen to be 1000pF for C₃₄ and C₃₅.

In order to determine the resistor value, the fully charge and discharge time 5 × R × C is set to 10% of the shortest pulse width. Shortest pulse width can be determined using Equation 28.

Equation 28.

In this design example, three 10-Ω resistors were chosen in parallel to obtain the calculated value and desired form factor. In the EVM schematic, the resistors are R₃₀, R₃₃, R₂₀ and R₂₉, R₂₈, R₂₆.