SLUSAQ4G October 2011 – September 2022 TPS40422
PRODUCTION DATA
User-selectable, power good thresholds determine at what voltage the PGOOD pin is allowed to go high and the associated PMBus flags are cleared. There are three possible settings that can be had. See the POWER_GOOD_ON and POWER_GOOD_OFF command descriptions for complete details. These commands establish symmetrical values above and below the nominal voltage. Values entered for each threshold should be the voltages corresponding to the threshold below the nominal output voltage. For instance, if the nominal output voltage is 3.3 V, and the desired power good on thresholds are ±5%, the POWER_GOOD_ON command is issued with 2.85 V as the desired threshold. The POWER_GOOD_OFF command must be set to a lower value (higher percentage) than the POWER_GOOD_ON command as well.
The FB pin senses the output voltage for the purposes of power good detection. This sensing results in the inherent filtering action provided by the compensation network connected from the COMP pin to the FB pin. As the output voltage rises or falls below the nominal value, the error amplifier attempts to force the FB pin to match its reference voltage. When the error amplifier is no longer able to do this, the FB pin begins to drift and trip the power good threshold. For this reason the network from the COMP pin to the FB pin should have no purely resistive path.
Power good de-asserts during all startups, after any fault condition is detected or whenever the device is turned off or in a disabled state (OPERATION command or CNTLx pins put the device into a disabled or off state). The PGOOD pin acts as a diode to GND when the device has no power applied to the VDD pin.