Table 1. Design Parameters

8.2.2.1 D-CAP Mode Operation

The VFB voltage is compared with the internal reference voltage after the divider resistors. The PWM comparator determines the timing to turn on the top MOSFET. The gain and speed of the comparator is high enough to keep the voltage at the beginning of each on cycle (or the end of off cycle) substantially constant. The DC output voltage may have line regulation due to ripple amplitude that slightly increases as the input voltage increases.

For loop stability, the 0 dB frequency, f₀, defined in Equation 6 must be lower than 1/4 of the switching frequency.

Equation 6.

As f₀ is determined solely by the output capacitor characteristics, loop stability of D-CAP Mode is determined by capacitor chemistry. For example, specialty polymer capacitors (SP-CAP) have Co in the order of several 100 μF and ESR in range of 10 mΩ. These values make f₀ in the order of 100 kHz or less and the loop is stable. However, ceramic capacitors have f₀ at more than 700 kHz, which is not suitable for this operational mode.

Although D-CAP Mode provides many advantages such as ease-of-use, minimum external component configuration, and extremely short response time, due to not employing an error amplifier in the loop, a sufficient feedback signal must be provided by an external circuit to reduce the jitter level. The required signal level is approximately 15 mV at the comparing point. This generates V_ripple = (V_OUT/0.75) × 15 mV at the output node. The output capacitor ESR should meet this requirement.

The external component selection is simple in D-CAP Mode:

1. Determine the value of R1 and R2

The recommended R2 value is 10 kΩ to 100 kΩ. Calculate R1 by Equation 7.

Equation 7.
2. Choose R_TON

Switching frequency is usually determined by the overall view of the DC-DC converter design of: size, efficiency or cost, and mostly dictated by external component constraints such as the size of inductor and/or output capacitor. When an extremely low or high duty factor is expected, the minimum on-time or off-time also must be considered to satisfy the required duty factor. Once the switching frequency is decided, R_TON can be determined by Equation 8 and Equation 9,

Equation 8.
Equation 9.
3. Choose inductor

A good starting point inductance value is where the ripple current is approximately 1/4 to 1/2 of the maximum output current.

Equation 10.

For applications that require fast transient response with minimum V_OUT overshoot, consider a smaller inductance than above. The cost of a small inductance value is higher steady-state ripple, larger line regulation, and higher switching loss.

The inductor also needs to have low DCR to achieve good efficiency, as well as enough room above peak inductor current before saturation. The peak inductor current can be estimated in Equation 11.

Equation 11.
4. Choose output capacitor(s)

Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are recommended. Determine ESR to meet the required ripple voltage above. A quick approximation is shown in Equation 12.

Equation 12.
5. Choose MOSFETs

Loss-less current sensing and overcurrent protection of the TPS51117 is determined by R_DS(on) of the low-side MOSFET. So, R_DS(on) times the inductor current value at the overcurrent point should be in the range of 30 mV to 200 mV for the entire operational temperature range. Assuming a 20% guard band, R_DS(on) in Equation 13 should satisfy the full temperature range.

Equation 13.
6. Choose R_trip

Once the low-side FET is decided, select an appropriate R_trip value that provides V_trip equal to R_DS(on) times I_peak.

7. LPF for V5FILT

To reject high-frequency noise and also secure safe start-up of the internal reference circuit, apply 1 μF of MLCC closely at the V5FILT pin with a 300-Ω resistor to create a LPF between +5-V supply and the pin.

8. VBST capacitor, VBST diode

Apply 0.1-μF MLCC between VBST and the LL node as the flying capacitor for the high-side FET driver. The TPS51117 has its own boost diode onboard between V5DRV and VBST. This is a PN junction diode and strong enough for most typical applications. However, in case efficiency has priority over cost, the designer may add a Schottky diode externally to improve gate drive voltage of the high-side FET. A Schottky diode has a higher leakage current, especially at high temperature, than a PN junction diode. A low-leakage diode should be selected in order to maintain VBST voltage during low-frequency operation in skip mode.