SLVSB10F July 2012 – November 2020 TPS54020
PRODUCTION DATA
PARAMETER | CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY VOLTAGE (VIN AND PVIN PINS) | ||||||
PVIN operating input voltage | 1.6 | 17 | V | |||
VIN operating input voltage | 4.5 | 17 | V | |||
VIN internal UVLO threshold | VIN Rising | 4 | 4.5 | V | ||
VIN internal UVLO hysteresis | 150 | mV | ||||
VIN shutdown supply current | VEN = 0 V | 2 | 10 | µA | ||
VIN operating – nonswitching supply current | VVSENSE = 610 mV | 600 | 1000 | µA | ||
ENABLE AND UVLO (EN PIN) | ||||||
VEN | Enable threshold | Rising | 1.22 | 1.26 | V | |
Falling | 1.10 | 1.17 | V | |||
IP | Input current VEN below threshold | VEN = 1.1 V | –1.15 | µA | ||
IH | Added hysteresis current VEN above threshold | VEN = 1.3 V | –3.3 | µA | ||
VOLTAGE REFERENCE | ||||||
VREF | Voltage reference | 0 A ≤ IOUT ≤ 10 A, –40°C ≤ TA ≤ 150°C | 0.594 | 0.6 | 0.606 | V |
MOSFET | ||||||
DRVH | High-side switch resistance | BOOT-PH = 3 V | 9.5 | 18 | mΩ | |
BOOT-PH = 6 V(1) | 8 | 14 | mΩ | |||
DRVL | Low-side switch resistance(1) | VVIN = 12 V | 6 | 11 | mΩ | |
ERROR AMPLIFIER | ||||||
Error amplifier input bias current | VVIN = 12 V | 50 | nA | |||
gM | Error amplifier transconductance | –2 µA < ICOMP < 2 µA, VCOMP = 1 V | 1300 | µS | ||
Error amplifier dc gain | VVSENSE = 0.6 V | 3000 | V/V | |||
Error amplifier source/sink | VCOMP = 1 V, 100 mV Overdrive | ±100 | µA | |||
Start switching threshold | VCOMP | 0.27 | V | |||
gM | COMP to ISWITCH transconductance | IILIM = NC | 20 | A/V | ||
IILIM = RTN | 17 | |||||
499 kΩ (1%) between ILIM and RTN | 13 | |||||
CURRENT LIMIT | ||||||
High-side switch current limit threshold | IILIM = NC | 13.4 | 15.1 | 16.5 | A | |
IILIM = RTN | 11.2 | 12.75 | 14 | |||
High-side switch current limit threshold | 499 kΩ (1%) between ILIM and RTN | 8.3 | 9.4 | 10.2 | A | |
Low-side switch sourcing current limit | IILIM = NC | 11 | 13 | 15 | A | |
IILIM = RTN | 9 | 10.5 | 12 | |||
Low-side switch sourcing current limit | 499 kΩ (1%) between ILIM and RTN | 6.5 | 8 | 9.5 | A | |
Low-side switch sinking current limit | –ve current denotes current sourced from PH pin | –0.2 | –1.15 | A | ||
Overcurrent protection scheme | (HICCUP = RTN) | Cycle-by-cycle | ||||
Hiccup delay before re-start | HICCUP OPEN | 16384 | Cycles | |||
Hiccup wait time | HICCUP OPEN | 128 | Cycles | |||
THERMAL SHUTDOWN | ||||||
Thermal shutdown | 175 | °C | ||||
Thermal shutdown hysteresis | 10 | °C | ||||
Thermal shutdown hiccup time | 16384 | Cycles | ||||
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN) | ||||||
Switching frequency | RRT/CLK = 250 kΩ (1%) | 185 | 205 | 230 | kHz | |
RRT/CLK = 100 kΩ (1%) | 475 | 500 | 525 | |||
RRT/CLK = 50 kΩ (1%) | 890 | 990 | 1090 | |||
Minimum CLK pulse width | 20 | ns | ||||
RT/CLK high threshold | 2 | V | ||||
RT/CLK low threshold | 0.8 | V | ||||
RT/CLK falling edge to PH rising edge delay | Measure at 500 kHz with RT resistor in series | 66 | ns | |||
PLL frequency range | 200 | 1200 | kHz | |||
SYNC_OUT (SYNC_OUT PIN) | ||||||
Phase with RT/CLK | 180 | Degree | ||||
SYNC_OUT low threshold | 0.8 | V | ||||
SYNC_OUT high threshold | 2 | V | ||||
PH (PH PIN) | ||||||
tON(min) | Minimum on-time | Measured at 90% to 90% of VIN, IPH = 2 A | 112 | 165 | ns | |
IPH(LK) | PH leakage current | VVIN = 17 V, VOUT = 0.6 V, TA = 150°C | 300 | µA | ||
BOOT (BOOT PIN) | ||||||
BOOT-PH UVLO | 2.1 | 3 | V | |||
SOFT START AND TRACKING (SS/TR PIN) | ||||||
ISS | Soft-start charge current | 2.1 | 2.3 | 2.5 | µA | |
SS/TR to VSENSE matching | VSS/TR = 0.4 V | 22 | 45 | mV | ||
POWER GOOD (PWRGD PIN) | ||||||
VSENSE threshold | VVSENSE falling (Fault) | 91 | %VREF | |||
VVSENSE rising (Good) | 95 | |||||
VVSENSE rising (Fault) | 108 | |||||
VVSENSE falling (Good) | 104 | |||||
Output high leakage | VVSENSE = VREF, VPWRGD = 5.5 V | 3 | 100 | nA | ||
Output low | IPWRGD = 2 mA | 0.3 | V | |||
Minimum input voltage for valid output | VPWRGD < 0.5 V at 100 µA | 0.6 | 1 | V | ||
Minimum soft-start voltage for valid PWRGD | 1.4 | V |