SLVS500D DECEMBER   2003  – June 2019 TPS54110

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
  4. 4 Revision History
  5. 5 Device Information
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Thermal Information
    4. 7.4 Electrical Characteristics
    5. 7.5 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VBIAS Regulator (VBIAS)
      2. 8.3.2 Voltage Reference
      3. 8.3.3 Oscillator and PWM Ramp
      4. 8.3.4 Error Amplifier
      5. 8.3.5 PWM Control
      6. 8.3.6 Dead-Time Control and MOSFET Drivers
      7. 8.3.7 Overcurrent Protection
      8. 8.3.8 Thermal Shutdown
      9. 8.3.9 Power Good (PWRDG)
    4. 8.4 Undervoltage Lockout (UVLO)
    5. 8.5 Slow-Start/Enable (SS/ENA)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical TPS54110 Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Switching Frequency
          2. 9.2.1.2.2 Input Capacitors
          3. 9.2.1.2.3 Output Filter Components
            1. 9.2.1.2.3.1 Inductor Selection
            2. 9.2.1.2.3.2 Capacitor Selection
          4. 9.2.1.2.4 Compensation Components
          5. 9.2.1.2.5 Bias and Bootstrap Capacitors
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Very-Small Form-Factor Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Two-Output Sequenced-Startup Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Layout Considerations For Thermal Performance
    4. 10.4 Grounding and Powerpad Layout
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.2.3.2 Capacitor Selection

The important design parameters for the output capacitor are dc voltage, ripple current, and equivalent series resistance (ESR). The dc-voltage and ripple-current ratings must not be exceeded. The ESR rating is important because along with the inductor current it determines the output ripple voltage level. The actual value of the output capacitor is not critical, but some practical limits do exist. Consider the relationship between the desired closed-loop crossover frequency of the design and LC corner frequency of the output filter. In general, it is desirable to keep the closed-loop crossover frequency at less than 1/5 of the switching frequency. With high switching frequencies such as the 700 kHz frequency of this design, internal circuit limitations of the TPS54110 limit the practical maximum crossover frequency to about 100 kHz. To allow adequate phase gain in the compensation network, set the LC corner frequency to approximately one decade below the closed-loop crossover frequency. This limits the minimum capacitor value for the output filter to:

Equation 10. TPS54110 equation7_lvs500.gif

where

  • K is the frequency multiplier for the spread between fLC
  • fCO. K should be between 5 and 15, typically 10 for one decade of difference.

For a desired crossover of 60 kHz, K=10 and a 6.8 μH inductor, the minimum value for the output capacitor is 100 μF. The selected output capacitor must be rated for a voltage greater than the desired output voltage plus one half the ripple voltage. Any derating factors must also be included. The maximum RMS ripple current in the output capacitor is given by Equation 11:

Equation 11. TPS54110 equation8_lvs500.gif

where

  • NC is the number of output capacitors in parallel

The maximum ESR of the output capacitor is determined by the allowable output ripple specified in the initial design parameters. The output ripple voltage is the inductor ripple current times the ESR of the output filter so the maximum specified ESR as listed in the capacitor data sheet is given by Equation 12:

Equation 12. TPS54110 equation9_lvs500.gif

For this design example, a single 100-µF output capacitor is chosen for C2. The calculated RMS ripple current is 80 mA and the maximum ESR required is 87 mΩ. An example of a suitable capacitor is the Sanyo Poscap 6TPC100M, rated at 6.3 V with a maximum ESR of 45 mΩ and a ripple-current rating of 1.7 A.

Other capacitor types work well with the TPS54110, depending on the needs of the application.