SLVS751E November 2007 – January 2024 TPS5430-Q1
PRODUCTION DATA
The output voltage of the regulator is set by feeding back the center point voltage of an external resistor divider network to the VSENSE pin. In steady-state operation, VSENSE voltage must be equal to the voltage reference, 1.221 V.
The TPS5430-Q1 implements internal compensation to simplify the regulator design. Because the TPS5430-Q1 uses voltage-mode control, a type-3 compensation network has been designed on chip to provide a high crossover frequency and a high phase margin for good stability. See Internal Compensation Network in the Advanced Information section for more details.