SLVSI40 August   2024 TPS544E27

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Device and Documentation Support
    1. 5.1 Receiving Notification of Documentation Updates
    2. 5.2 Support Resources
    3. 5.3 Trademarks
    4. 5.4 Electrostatic Discharge Caution
    5. 5.5 Glossary
  7. 6Revision History
  8. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Single chip power supply for SVID rails
  • Intel® VR14 and VR13 compliant
  • VR14.Cloud compliant with telemetry level 2 and security level 2
  • PMBus® 1.5 interface with NVM for configuration, telemetry (V/I/T), and fault reporting
  • Input voltage: 4V to 18V
  • Output voltage: 0.25V to 5.5V
  • Supports external 5V bias improving efficiency and enabling 2.7V minimum input voltage
  • Output current: 40A continuous and 50A peak
  • Cycle-by-cycle valley IOUT OCF limit programmable up to 50A
  • Input power monitoring (PIN sense)
  • Programmable DCM or FCCM operation
  • Switching frequency: 400kHz to 2MHz
  • Programmable internal loop compensation including droop (DC Load Line)
  • Programmable soft-start time from 0.5ms to 16ms
  • Programmable soft-stop time from 0.5ms to 4ms
  • Programmable output voltage slew rate: 0.625mV/µs to 25mV/µs
  • Programmable VIN UVLO, VOUT OVF/UVF, and OTF
  • Safe start-up into prebiased outputs
  • Precision voltage reference and differential remote sense for high output accuracy
    • ±0.5% tolerance from 0°C to 85°C junction
    • ±1% tolerance from –40°C to 125°C junction
  • Analog output current output pin (IMON)
  • D-CAP+™ control topology with fast transient response
  • Open-drain power-good output (VRRDY)