SLVSB69C June 2012 – September 2021 TPS54719
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Fixed Frequency PWM Control
- 7.3.2 Slope Compensation And Output Current
- 7.3.3 Bootstrap Voltage (Boot) And Low Dropout Operation
- 7.3.4 Error Amplifier
- 7.3.5 Voltage Reference
- 7.3.6 Adjusting The Output Voltage
- 7.3.7 Enable and Adjusting Undervoltage Lockout
- 7.3.8 Slow Start/Tracking Pin
- 7.3.9 Sequencing
- 7.4
Device Functional Modes
- 7.4.1 Constant Switching Frequency And Timing Resistor (RT Pin)
- 7.4.2 Overcurrent Protection
- 7.4.3 Frequency Shift
- 7.4.4 Reverse Overcurrent Protection
- 7.4.5 Power Good (PWRGD Pin)
- 7.4.6 Overvoltage Transient Protection
- 7.4.7 Thermal Shutdown
- 7.4.8 Small Signal Model For Loop Response
- 7.4.9 Simple Small Signal Model For Peak Current Mode Control
- 7.4.10 Small Signal Model For Frequency Compensation
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 High Frequency, 1.8-V Output Power Supply Design With Adjusted UVLO
- 8.2.2 Design Requirements
- 8.2.3
Detailed Design Procedure
- 8.2.3.1 Selecting The Switching Frequency
- 8.2.3.2 Output Inductor Selection
- 8.2.3.3 Output Capacitor
- 8.2.3.4 Input Capacitor
- 8.2.3.5 Slow-Start Capacitor
- 8.2.3.6 Bootstrap Capacitor Selection
- 8.2.3.7 Undervoltage Lockout Set Point
- 8.2.3.8 Output Voltage And Feedback Resistors Selection
- 8.2.3.9 Compensation
- 8.2.4 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
- RTE|16
Thermal pad, mechanical data (Package|Pins)
- RTE|16
Orderable Information
7.4.9 Simple Small Signal Model For Peak Current Mode Control
Figure 7-9 is a simple small signal model that can be used to understand how to design the frequency compensation. The TPS54719 power stage can be approximated to a voltage controlled current source (duty cycle modulator) supplying current to the output capacitor and load resistor. The control to output transfer function is shown in Equation 10 and consists of a dc gain, one dominant pole, and one ESR zero. The quotient of the change in switch current and the change in COMP pin voltage (node c in Figure 7-9) is the power stage transconductance. The gm for the TPS54719 is 25 A/V. The low frequency gain of the power stage frequency response is the product of the transconductance and the load resistance as shown in Equation 11. As the load current increases and decreases, the low frequency gain decreases and increases, respectively. This variation with load can seem problematic at first glance, but the dominant pole moves with load current [see Equation 12]. The combined effect is highlighted by the dashed line in the right half of Figure 7-10. As the load current decreases, the gain increases and the pole frequency lowers, keeping the 0-dB crossover frequency the same for the varying load conditions which makes it easier to design the frequency compensation.
Figure 7-10 Simple Small Signal Model And Frequency Response For Peak Current Mode Control
