SLVSB69C June   2012  – September 2021 TPS54719

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency PWM Control
      2. 7.3.2 Slope Compensation And Output Current
      3. 7.3.3 Bootstrap Voltage (Boot) And Low Dropout Operation
      4. 7.3.4 Error Amplifier
      5. 7.3.5 Voltage Reference
      6. 7.3.6 Adjusting The Output Voltage
      7. 7.3.7 Enable and Adjusting Undervoltage Lockout
      8. 7.3.8 Slow Start/Tracking Pin
      9. 7.3.9 Sequencing
    4. 7.4 Device Functional Modes
      1. 7.4.1  Constant Switching Frequency And Timing Resistor (RT Pin)
      2. 7.4.2  Overcurrent Protection
      3. 7.4.3  Frequency Shift
      4. 7.4.4  Reverse Overcurrent Protection
      5. 7.4.5  Power Good (PWRGD Pin)
      6. 7.4.6  Overvoltage Transient Protection
      7. 7.4.7  Thermal Shutdown
      8. 7.4.8  Small Signal Model For Loop Response
      9. 7.4.9  Simple Small Signal Model For Peak Current Mode Control
      10. 7.4.10 Small Signal Model For Frequency Compensation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 High Frequency, 1.8-V Output Power Supply Design With Adjusted UVLO
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Selecting The Switching Frequency
        2. 8.2.3.2 Output Inductor Selection
        3. 8.2.3.3 Output Capacitor
        4. 8.2.3.4 Input Capacitor
        5. 8.2.3.5 Slow-Start Capacitor
        6. 8.2.3.6 Bootstrap Capacitor Selection
        7. 8.2.3.7 Undervoltage Lockout Set Point
        8. 8.2.3.8 Output Voltage And Feedback Resistors Selection
        9. 8.2.3.9 Compensation
      4. 8.2.4 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Power Dissipation Estimate
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Small Signal Model For Frequency Compensation

The TPS54719 uses a transconductance amplifier for the error amplifier and readily supports two of the commonly used frequency compensation circuits. The compensation circuits are shown in Figure 7-11. The Type 2 circuits are most likely implemented in high bandwidth power supply designs using low-ESR output capacitors. In Type 2A, one additional high frequency pole is added to attenuate high frequency noise.

GUID-BD0D4945-5077-4CD2-9ABA-A40C0AC12000-low.gifFigure 7-11 Types Of Frequency Compensation

The design guidelines for TPS54719 loop compensation are as follows:

  1. The modulator pole, fpmod, and the esr zero, fz1, must be calculated using Equation 14 and Equation 15. Derating the output capacitor (COUT) can be needed if the output voltage is a high percentage of the capacitor rating. Use the capacitor manufacturer information to derate the capacitor value. Use Equation 16 and Equation 17 to estimate a starting point for the crossover frequency, fc. Equation 16 is the geometric mean of the modulator pole and the esr zero and Equation 17 is the mean of modulator pole and the switching frequency. Use the lower value of Equation 16 or Equation 17 as the maximum crossover frequency.
    Equation 14. GUID-28326374-9E6F-4715-ABB0-B30207F03ECD-low.gif
    Equation 15. GUID-BFCE0A37-6468-4604-9D9E-FB8CC655EFE9-low.gif
    Equation 16. GUID-AC7FC65C-4A39-427A-B095-298CB1EF281F-low.gif
    Equation 17. GUID-19463AE7-6CEF-4FD7-B866-3CF836523B6A-low.gif
  2. R3 can be determined by
    Equation 18. GUID-5D7373E9-D652-4D08-B7FA-73E4109B3DDC-low.gif

    where:

    • gmea is the amplifier gain (250 μA/V)
    • gmps is the power stage gain (25 A/V)
  3. Place a compensation zero at the dominant pole GUID-414EF064-B86B-428D-923B-0778D91DB3EF-low.gif. C1 can be determined by
    Equation 19. GUID-6D8C93BC-5561-4CAF-9E67-E0C88865CEE9-low.gif
  4. C2 is optional. It can be used to cancel the zero from the ESR of Co.
    Equation 20. GUID-CCF7A2F5-23A4-4D76-953B-968896BEB405-low.gif