SLVSHN0 September 2024 TPS548B23
ADVANCE INFORMATION
For this design we use the internal feedback mode and the switching frequency is configured by tying the CFG2 pin to VCC (600kHz), GND (800kHz), or by leaving it floating (1.2MHz). Refer to Table 7-3.
If the external feedback configuration is being used, the CFG1 pin is used to select between four switching frequencies (600kHz, 800kHz, 1MHz, or 1.2MHz) Refer to Table 7-2 for more information using the CFG1 pin configuration in external feedback mode.
Switching frequency selection is a tradeoff between higher efficiency and smaller system design size. Lower switching frequency yields higher overall efficiency but relatively bigger external components. Higher switching frequencies cause additional switching losses which impact efficiency and thermal performance. For this design, connect CFG2 pin to AGND to set the switching frequency to 800kHz
When selecting the switching frequency of a buck converter, the minimum on-time and minimum off-time must be considered. Equation 6 calculates the maximum fSW before being limited by the minimum on-time. When hitting the minimum on-time limits of a converter with D-CAP4 control, the effective switching frequency changes to keep the output voltage regulated. This calculation ignores resistive drops in the converter to give a worst case estimation.
Equation 6 calculates the maximum fSW before being limited by the minimum off-time. When hitting the minimum off-time limits of a converter with D-CAP4 control, the operating duty cycle maxes out and the output voltage begins to drop with the input voltage. This equation requires the DC resistance of the inductor, RDCR, selected in the following step so this preliminary calculation assumes a resistance of 1.4mΩ. If operating near the maximum fSW limited by the minimum off-time, the variation in resistance across temperature must be considered when using Equation 8. The selected fSW of 800kHz is below the two calculated maximum values.