SLVSHC5A November   2023  – February 2024 TPS548D26

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Internal VCC LDO and Using an External Bias on the VCC and VDRV Pin
      2. 6.3.2  Input Undervoltage Lockout (UVLO)
        1. 6.3.2.1 Fixed VCC_OK UVLO
        2. 6.3.2.2 Fixed VDRV UVLO
        3. 6.3.2.3 Fixed PVIN UVLO
        4. 6.3.2.4 Enable
      3. 6.3.3  Set the Output Voltage
      4. 6.3.4  Differential Remote Sense and Feedback Divider
      5. 6.3.5  Start-Up and Shutdown
      6. 6.3.6  Loop Compensation
      7. 6.3.7  Set Switching Frequency and Operation Mode
      8. 6.3.8  Switching Node (SW)
      9. 6.3.9  Overcurrent Limit and Low-side Current Sense
      10. 6.3.10 Negative Overcurrent Limit
      11. 6.3.11 Zero-Crossing Detection
      12. 6.3.12 Input Overvoltage Protection
      13. 6.3.13 Output Undervoltage and Overvoltage Protection
      14. 6.3.14 Overtemperature Protection
      15. 6.3.15 Power Good
    4. 6.4 Device Functional Modes
      1. 6.4.1 Forced Continuous-Conduction Mode
      2. 6.4.2 Auto-Skip Eco-mode Light Load Operation
      3. 6.4.3 Powering the Device From a 12-V Bus
      4. 6.4.4 Powering the Device From a Split-Rail Configuration
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Inductor Selection
        2. 7.2.3.2 Input Capacitor Selection
        3. 7.2.3.3 Output Capacitor Selection
        4. 7.2.3.4 VCC and VRDV Bypass Capacitor
        5. 7.2.3.5 BOOT Capacitor Selection
        6. 7.2.3.6 PG Pullup Resistor Selection
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
        1. 7.4.2.1 Thermal Performance on TPS548D26 Evaluation Board
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.4 Application Curves

GUID-20231130-SS0I-QQ4W-KP5C-V7SSCJS1WV76-low.svg
PVIN = 12V

VCC = Internal LDO

VOUT = 1.1V

MODE = FCCM
Figure 7-2 Efficiency vs Output Current
GUID-20231130-SS0I-L11N-RSL9-FCCSDB2WD52Z-low.svg
PVIN = 12V

VCC = External 5V Bias

VOUT = 1.1V

MODE = FCCM
Figure 7-4 Efficiency vs Output Current
GUID-20231203-SS0I-T4C4-CL0M-5V35X8SRHZB5-low.svg
PVIN = 12V VCC = External 5V Bias VOUT = 1.1V
MODE = DCM
Figure 7-6 Efficiency vs Output Current
GUID-20231130-SS0I-KP0R-H47T-BCQN8JRPKPVV-low.svg
PVIN = 12V VCC = Internal LDO VOUT = 1.1V
MODE = FCCM No DC Load Line (DCLL)
Figure 7-8 Load Regulation vs Output Current
GUID-20231130-SS0I-FR6K-944Q-CTCLSJH550T9-low.svg
PVIN = 12V VCC = Internal LDO VOUT = 1.1V
MODE = DCM No DC Load Line (DCLL)
Figure 7-10 Load Regulation vs Output Current
GUID-20240209-SS0I-HB8S-FDWG-SJNTLWXN8BKL-low.pngFigure 7-12 ENABLE Start-Up Waveform, PVIN = 12V, VOUT = 1.1V
GUID-20240209-SS0I-BZFZ-HSLM-LGVFJSW2KZZD-low.pngFigure 7-14 Output Voltage Ripple, 800kHz FCCM, 40A Load, PVIN = 12V, VOUT = 1.1V
GUID-20240209-SS0I-QBTC-HBXN-XG80TZ2NWRZR-low.pngFigure 7-16 Output Voltage Ripple, DCM, No load, PVIN = 12V, VOUT = 1.1V
GUID-20231130-SS0I-L61Z-M8HM-L4D2MPXBDQVW-low.svg
PVIN = 12V VCC = Internal LDO VOUT = 1.1V
MODE = FCCM
Figure 7-3 Power Dissipation vs Output Current
GUID-20231130-SS0I-R1RF-Z6RD-FDJHZPHPWBDH-low.svg
PVIN = 12V VCC = External 5V Bias VOUT = 1.1V
MODE = FCCM
Figure 7-5 Power Dissipation vs Output Current
GUID-20231130-SS0I-KMMX-MNDH-8CJZWDH5M4MB-low.svg
PVIN = 12V VCC = External 5V Bias VOUT = 1.1V
MODE = DCM
Figure 7-7 Power Dissipation vs Output Current
GUID-20231130-SS0I-HHZX-LMHX-KQQ2F4SFGTPS-low.svg
PVIN = 12V

VCC = External 5V Bias

 VOUT = 1.1V
MODE = FCCM No DC Load Line (DCLL)
Figure 7-9 Load Regulation vs Output Current
GUID-20231130-SS0I-JNK5-JVXJ-MHKGGF1NG18M-low.svg
PVIN = 12V

VCC = External 5V Bias

 VOUT = 1.1V
MODE = DCM No DC Load Line (DCLL)
Figure 7-11 Load Regulation vs Output Current
GUID-20240209-SS0I-L8RH-04CS-VJHW9XQJLHKG-low.pngFigure 7-13 ENABLE Shutdown Waveform, PVIN = 12V, VOUT = 1.1V
GUID-20240209-SS0I-BKCN-LFH1-BRL1CWQ91ZCG-low.pngFigure 7-15 Output Voltage Ripple, 800kHz FCCM, No load, PVIN = 12V, VOUT = 1.1V