SLUSEI0 October   2021 TPS562212

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Advanced Emulated Current Mode Control
      2. 7.3.2 Mode Selection and PG/SS Pin Function Configuration
      3. 7.3.3 Power Good (PG)
      4. 7.3.4 Soft Start and Pre-Biased Soft Start
      5. 7.3.5 Output Discharge Through PG/SS Pin
      6. 7.3.6 Precise Enable and Adjusting Undervoltage Lockout
      7. 7.3.7 Overcurrent Limit and Undervoltage Protection
      8. 7.3.8 Overvoltage Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 FCCM Operation
      4. 7.4.4 CCM Operation
      5. 7.4.5 DCM Operation and Eco-mode Operation
      6. 7.4.6 On-Time Extension for Large Duty Cycle Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor Selection
        7. 8.2.2.7 Undervoltage Lockout Set Point
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Third-Party Products Disclaimer
        2. 11.1.1.2 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Capacitor Selection

The device requires an input decoupling capacitor. A bulk capacitor is needed depending on the application. TI recommends a ceramic capacitor over 10 μF for the decoupling capacitor. An additional 0.1-μF capacitor (C3) from the VIN pin to ground is recommended to provide additional high frequency filtering. The capacitor voltage rating needs to be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum input current ripple of the device. The input ripple current can be calculated using Equation 18.

Equation 18. GUID-8437FB6E-1C72-43FF-A37D-9817E1DAFDA7-low.gif

The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors because they have a high capacitance-to-volume ratio and are fairly stable over temperature. The output capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor decreases as the DC bias across a capacitor increases. For this example design, a ceramic capacitor with at least a 25-V voltage rating is required to support the maximum input voltage. For this design, one Murata GRM21BR61E226ME44L (10-μF, 25-V, 0805, X5R) capacitor has been selected. The effective capacitance under input voltage of 12 V is 0.18 × 22 = 4 μF. The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 19. Using the design example values, IOUT_MAX = 2 A, CIN_E = 4 μF, and fSW = 1.2 MHz, yield an input voltage ripple of 125 mV and a RMS input ripple current of 0.47 A.

Equation 19. GUID-7C815314-C448-431A-BE24-AF5CF913A452-low.gif

where

  • RESR_MAX = Maximum series resistance of the input capacitor