Table 4. Design Parameters

8.2.1.2.1 Inductor Selection

Because the selection of the inductor affects the power supply steady-state operation, transient behavior, loop stability, and the boost converter efficiency, the inductor is the most important component in switching power regulator design. There are three specifications most important to the performance of the inductor: inductance value, DC resistance and saturation current. TPS61176 is designed to work with inductor values between 4.7 µH and 10 µH. A 4.7-µH inductor is typically available in a smaller or lower profile package, while a 10-µH inductor produces lower inductor ripple. If the boost output current is limited by the overcurrent protection of the device, using a 10-µH inductor can maximize the controller output current capability.

In a boost regulator, the inductor DC current can be calculated as Equation 5.

Equation 5.

where

• Vout = boost output voltage
• Iout = boost output current
• Vin = boost input voltage
• η = power conversion efficiency, use 85% for TPS61176 normal applications

The inductor current peak-to-peak ripple can be calculated as Equation 6.

Equation 6.

where

• I_PP = inductor peak-to-peak ripple
• L = inductor value
• F_S = Switching frequency
• Vout = boost output voltage
• Vin = boost input voltage

Therefore, the peak current seen by the inductor is calculated with Equation 7.

Equation 7.

Select the inductor with saturation current over the calculated peak current. To calculate the worse case inductor peak current, use minimum input voltage, maximum output voltage and maximum load current.

Converter efficiency is dependent on the resistance of its high current path and switching losses associated with the internal switch and external power diode. Although the TPS61176 has optimized the internal switch resistance, the overall efficiency is affected by the inductor’s DC resistance (DCR). Lower DCR improves efficiency. However, there is a trade-off between DCR and inductor footprint. Furthermore, shielded inductors typically have higher DCR than unshielded ones.

Note that inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0-A value depending on how the inductor vendor defines saturation. Table 5 lists the recommended inductors.

8.2.1.2.2 Output Capacitor Selection

The output capacitor is mainly selected to meet the requirement for the loop stability and the output ripple. The loop is designed to be stable with an output capacitor within 2.2-µF to 10-µF range. This output ripple is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Due to its low ESR, the ripple caused by ESR could be neglected for ceramic capacitors. Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated with Equation 8.

Equation 8.

where

• Vripple = peak-to-peak output ripple.

Note that capacitor degradation increases the ripple much. Select the capacitor which has less degradation at the output voltage. If the output ripple is too large, change a bigger capacitor could be helpful. Normally, X5R ±10% or better capacitors are recommended.

8.2.1.2.3 Schottky Diode Selection

The TPS61176 demands a low forward voltage, high-speed rectification and low capacitance schottky diode for optimum efficiency. Ensure that the diode average and peak current rating exceeds the average output current and peak inductor current. In addition, the diode’s reverse breakdown voltage must exceed the open LED protection voltage. Vishay SS2P5, MSS1P4, and NXP PMEG4010EPK are recommended for the TPS61176.

8.2.1.2.4 Isolation FET Selection

The TPS61176 provides a gate driver at MODE/FAULT pin to drive an external P-channel MOSFET which can act as an isolation MOSFET. When the device is disabled or output short to ground issue happens, MODE/FAULT pin can turn off the isolation MOSFET to cut off the power path from the battery to the output. The source of the MOSFET should be connected to the battery input, and an external resistor must be connected between the source and gate of the MOSFET to keep the FET off when the device is disabled. This gate resistor also acts as a mode resistor to select the dimming mode. To turn on the isolation MOSFET, an internal current sink pulls MODE/FAULT pin low. When output short to ground fault happens, an internal switch pulls up the MODE/FAULT pin to VIN, turning off the isolation MOSFET immediately.

When the isolation FET is turned on during start-up, an inrush current will flow through the MOSFET from battery to charge the output capacitor. If the peak current is too large, a capacitor can be connected between the source and the gate of the isolation MOSFET to control the turning on speed (C5 in Figure 9), thus controlling the inrush current. Normally, a 100-pF to 1-nF capacitor is recommended.

During output short to ground protection process, the catch diode (D2 in Figure 9) may be forward biased to provide the continuous current of the inductor when the isolation FET is turned off. In this case, the drain of the isolation FET swings below ground. The voltage across the isolation FET can be momentarily greater than the input voltage. Therefore, select at least 10-V maximum input MOSFET. Adding a capacitor parallel with D2 (refer to Figure 9) could also help reduce the voltage across MOSFET when this failure happens. The ON resistance of the MOSFET has large impact on power conversion efficiency because the MOSFET carries the input current. Select a MOSFET with R_ds(on) less than 100 mΩ to limit the power losses. In order to detect larger than 1 M R_Mode correctly, the gate leakage of isolation MOSFET should be less than 0.1 µA.

In multi-cell battery input applications, if the isolation MOSFET is connected, the voltage at MODE/FAULT pin may exceed its maximum rating voltage 7 V when the device is disabled or output short to ground issue happens. In order to prevent this over stress damange, isolation MOSFET can't be connected.

8.2.1.2.5 Audible Noise Reduction

Output voltage of the controller also ripples due to the load transient that occurs during PWM dimming. If the PWM dimming frequency is in the audible frequency range, the ripple can produce audible noises on the output ceramic capacitor. There are two ways of reducing or eliminating the audible noise. The first way is to reduce the amount of the output ripple, and therefore minimize the audible noise. The TPS61176 adopts a patented technology to limit this type of output ripple even with the minimum recommended output capacitance. The second way is to select PWM dimming frequency outside the audible frequency range to eliminate the audible noise completely. However, in some applications, the input PWM signal frequency range couldn’t be adjusted outside the audible frequency range. To solve this problem, the device provides the 22-kHz fixed frequency PWM dimming mode. In this dimming mode, no matter what the input PWM frequency is, the PWM dimming is implemented at 22 kHz, which is outside the audible frequency range, saving the effort to adjust the input PWM frequency.