SLVSAQ2C January   2014  – October 2014 TPS61230 , TPS61232

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Startup
      2. 8.3.2 Current Limit Operation
      3. 8.3.3 Enable/Disable
      4. 8.3.4 Undervoltage Lockout
      5. 8.3.5 Output Capacitor Discharge, TPS61231
      6. 8.3.6 Power Good Output
      7. 8.3.7 Over Voltage Protection
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Boost Normal Mode
      2. 8.4.2 Boost Power Save Mode
      3. 8.4.3 Zero Duty Cycle Mode
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS61230 2.3-V to 5.5-V Input, 5-V Output Converter
        1. 9.2.1.1 TPS61230 5-V Output Design Requirements
        2. 9.2.1.2 TPS61230 5-V Detailed Design Procedure
          1. 9.2.1.2.1 Programming the Output Voltage
          2. 9.2.1.2.2 Inductor and Capacitor Selection
            1. 9.2.1.2.2.1 Inductor Selection
            2. 9.2.1.2.2.2 Output Capacitor Selection
            3. 9.2.1.2.2.3 Input Capacitor Selection
          3. 9.2.1.2.3 Loop Stability, Feed Forward Capacitor
        3. 9.2.1.3 TPS61230 5-V Output Application Performance Plots
      2. 9.2.2 TPS61230 2.3-V to 5.5-V Input, 3.5-V Output Converter
        1. 9.2.2.1 TPS61230 3.5-V Output Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 TPS61230 3.5-V Output Application Performance Plots
      3. 9.2.3 TPS61230 Application with Feed Forward Capacitor for Best Transient Response
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at the GND pin of the IC. The most critical current path for all boost converters is from the switching FET, through the synchronous FET, then the output capacitors, and back to ground of the switching FET. Therefore, the output capacitors and their traces should be placed on the same board layer as the IC and as close as possible between the IC’s VOUT and GND pin.

See Figure 37 for the recommended layout.

11.2 Layout Example

TPS61230_Layout_RecoM.gifFigure 37. Layout Recommendation

11.3 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.

Two basic approaches for enhancing thermal performance are listed below.

  • Improving the power dissipation capability of the PCB design
  • Introducing airflow in the system

For more details on how to use the thermal parameters in the dissipation ratings table please check the application report Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017) and the application report Semiconductor and IC Package Thermal Metrics (SPRA953).