SLVSAQ2C January   2014  – October 2014 TPS61230 , TPS61232

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Startup
      2. 8.3.2 Current Limit Operation
      3. 8.3.3 Enable/Disable
      4. 8.3.4 Undervoltage Lockout
      5. 8.3.5 Output Capacitor Discharge, TPS61231
      6. 8.3.6 Power Good Output
      7. 8.3.7 Over Voltage Protection
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Boost Normal Mode
      2. 8.4.2 Boost Power Save Mode
      3. 8.4.3 Zero Duty Cycle Mode
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS61230 2.3-V to 5.5-V Input, 5-V Output Converter
        1. 9.2.1.1 TPS61230 5-V Output Design Requirements
        2. 9.2.1.2 TPS61230 5-V Detailed Design Procedure
          1. 9.2.1.2.1 Programming the Output Voltage
          2. 9.2.1.2.2 Inductor and Capacitor Selection
            1. 9.2.1.2.2.1 Inductor Selection
            2. 9.2.1.2.2.2 Output Capacitor Selection
            3. 9.2.1.2.2.3 Input Capacitor Selection
          3. 9.2.1.2.3 Loop Stability, Feed Forward Capacitor
        3. 9.2.1.3 TPS61230 5-V Output Application Performance Plots
      2. 9.2.2 TPS61230 2.3-V to 5.5-V Input, 3.5-V Output Converter
        1. 9.2.2.1 TPS61230 3.5-V Output Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 TPS61230 3.5-V Output Application Performance Plots
      3. 9.2.3 TPS61230 Application with Feed Forward Capacitor for Best Transient Response
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

11-PIN VSON
DRC PACKAGE
(Top View)
Pinout_SLVSAQ2.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NUMBER
SW 1,2 PWR The switch pin of the converter. It is connected to the drain of the internal Power MOSFETs.
VOUT 3,4 PWR Boost converter output pin.
PG 5 OUT Power Good open drain output. Can be left floating if not used.
SS 6 IN Soft startup pin. A soft startup capacitor connects to this pin to set the soft start time.
FB 7 IN Voltage feedback of adjustable versions. Must be connected to VOUT on fixed output voltage version.
HYS 8 OUT EN hysteresis program pin. See the application section for details. Can be left floating if not used.
EN 9 IN Enable logic input. Logic HIGH enables the device. Logic LOW disables the device and turns it into shutdown mode. This pin must be terminated.
VIN 10 IN Supply voltage pin.
GND 11 PWR Ground pin.