SLVSAO5B December   2010  – October 2015 TPS62590-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable
      2. 8.3.2 Mode Selection
      3. 8.3.3 Soft Start
      4. 8.3.4 Short-Circuit Protection
      5. 8.3.5 100% Duty-Cycle Low-Dropout Mode
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Save Mode
      2. 8.4.2 Dynamic Voltage Positioning
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Setting
        2. 9.2.2.2 External Feed-Forward Capacitor
        3. 9.2.2.3 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.3.1 Inductor Selection
          2. 9.2.2.3.2 Output Capacitor Selection
          3. 9.2.2.3.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VI Input voltage(2) –0.3 7 V
Voltage range at EN, MODE –0.3 VIN +0.3, ≤ 7 V
Voltage on SW –0.3 7 V
Peak output current Internally limited A
TJ Maximum operating junction temperature –40 125 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±1000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VIN Supply voltage 2.5 6 V
Output voltage range for adjustable voltage 0.75 VIN V
TA Operating ambient temperature –40 105 °C
TJ Operating junction temperature –40 125 °C
LOUT Effective inductance 1.5 4.7 µH
COUT Effective output-capacitance 4.7 22 µF
Cf Feed-forward capacitance 22 33 pF
CIN Effective input-capacitance 10 µF

6.4 Thermal Information

THERMAL METRIC(1)(2) TPS62590-Q1 UNIT
DRV (SON)
6 PINS
RθJA Junction-to-ambient thermal resistance 67.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 88.5 °C/W
RθJB Junction-to-board thermal resistance 37.2 °C/W
ψJT Junction-to-top characterization parameter 2 °C/W
ψJB Junction-to-board characterization parameter 37.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 7.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Simulated values based on four layer FR4 board (2-oz, 1-oz, 1-oz, 2-oz copper) with size: 76 mm × 114 mm × 1.6 mm

6.5 Electrical Characteristics

Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN = 3.6 V. External components CIN = 10 μF 0603, COUT = 10 μF 0603, L = 2.2 μH; see Parameter Measurement Information.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VI Input voltage range 2.5 6 V
IO Output current(4) VIN 2.7 V to 6 V 1000 mA
VIN 2.5 V to 2.7 V 600
IQ Operating quiescent current IO = 0 mA, PFM mode enabled
(MODE = GND) device not switching, See (1)		 15 μA
IO = 0 mA, switching with no load
(MODE = VIN) PWM mode,
VO = 1.8 V, VIN = 3 V		 3.8 mA
ISD Shutdown current EN = GND 0.5 μA
UVLO Undervoltage lockout threshold Falling 1.85 V
Rising 1.95
ENABLE, MODE
VIH High-level input voltage, EN, MODE 2.5 V ≤ VIN ≤ 6 V 1 VIN V
VIL Low-level input voltage, EN, MODE 2.5 V ≤ VIN ≤ 6 V 0 0.4 V
II Input bias current, EN, MODE EN, MODE = GND or VIN 0.01 1 μA
POWER SWITCH
rDS(on) High-side MOSFET on-resistance VIN = VGS = 3.6 V, TA = 25°C 250 mΩ
Low-side MOSFET on-resistance 190
ILIMF Forward current limit MOSFET high-side and low-side VIN = VGS = 3.6 V, TA = 25°C 1.19 1.4 1.78 A
TSD Thermal shutdown Increasing junction temperature 140 °C
Thermal shutdown hysteresis Decreasing junction temperature 20
OSCILLATOR
fSW Oscillator frequency 2.5 V ≤ VIN  ≤ 6 V 2.25 MHz
OUTPUT
VO Adjustable output voltage range 0.75 VI V
Vref Reference voltage 600 mV
VFB(PWM) Feedback voltage MODE = VIN, PWM mode,
2.5 V ≤ VIN  ≤ 6 V, See (2)		 –2.5% 0% 2.5%
VFB(PFM) Feedback voltage, PFM mode MODE = GND, device in PFM mode, 1% voltage positioning active, See (1) 1%
Load regulation –1 %/A
tStart Up Start-up time Time from active EN to reach 95% of VO 500 μs
tRamp VO ramp-up time Time to ramp from 5% to 95% of VO 250 μs
Ilkg Leakage current into SW pin VI = 3.6 V, VI = VO = VSW, EN = GND,
See (3)		 0.1 1 μA
(1) In PFM mode, the internal reference voltage is set to typ. 1.01 × Vref . See Parameter Measurement Information.
(2) For VIN = VO + 1 V
(3) In fixed output-voltage versions, the internal resistor divider network is disconnected from the FB pin.
(4) Not production tested.

6.6 Typical Characteristics

Table 1. Table Of Graphs

FIGURE
Efficiency vs Output Current VOUT = 1.8 V (Power-Save Mode) Figure 1
vs Output Current VOUT = 1.8 V (Forced PWM Mode) Figure 2
vs Output Current VOUT = 3.3 V (Power-Save Mode) Figure 3
vs Output Current VOUT = 3.3 V (Forced PWM Mode) Figure 4
Output Voltage vs Output Current VOUT = 1.8 V (Forced PWM Mode) Figure 5
vs Output Current VOUT = 1.8 V (Power-Save Mode) Figure 6
vs Output Current VOUT = 3.3 V (Forced PWM Mode) Figure 7
vs Output Current VOUT = 3.3 V (Power-Save Mode) Figure 8
Transient Behavior PFM to PWM to PFM Load Transient Figure 9
PWM Load Transient Figure 10
PFM Line Transient Figure 11
PWM Line Transient Figure 12
Typical Performance – PFM Mode Figure 13
Typical Performance – PWM Mode Figure 14
Shutdown Current into VIN vs. Input Voltage Figure 15
Quiescent Current vs Input Voltage Figure 16
Static Drain-Source On-State Resistance vs Input Voltage Figure 17
Figure 18
TPS62590-Q1 eff_io_lvs897.gif
Figure 1. Efficiency vs Output Current for
VOUT = 1.8 V (Power-Save Mode)
TPS62590-Q1 eff3_io_lvs897.gif
Figure 3. Efficiency vs Output Current
for VOUT = 3.3 V (Power-Save Mode)
TPS62590-Q1 vo_io_lvs897.gif
Figure 5. Output Voltage vs Output Current
vs Input Voltage for VOUT = 1.8 V (Power Saver Mode)
TPS62590-Q1 vo3_io_lvs897.gif
Figure 7. Output Voltage vs Output Current
vs Input Voltage for VOUT = 3.3 V (Forced PWM Mode)
TPS62590-Q1 pfm_lt_lvs764.gif
Figure 9. PFM to PWM to PFM Load Transient
TPS62590-Q1 pfm_ltr_lvs764.gif
Figure 11. PFM Line Transient
TPS62590-Q1 typ_opr_pfm_lvs764.gif
Figure 13. Typical Performance – PFM Mode
TPS62590-Q1 isd_v_vin_lvs897.gif
Figure 15. Shutdown Current Into VIN vs Input Voltage
TPS62590-Q1 rds_hs_vin_lvs897.gif
Figure 17. Static Drain-Source On-State Resistance vs Input Voltage
TPS62590-Q1 eff2_io_lvs897.gif
Figure 2. Efficiency vs Output Current
for VOUT = 1.8 V (Forced PWM Mode)
TPS62590-Q1 eff4_io_lvs897.gif
Figure 4. Efficiency vs Output Current
for VOUT = 3.3 V (Forced PWM Mode)
TPS62590-Q1 vo2_io_lvs897.gif
Figure 6. Output Voltage vs Output Current
vs Input Voltage for VOUT = 1.8 V (Forced PWM Mode)
TPS62590-Q1 vo4_io_lvs897.gif
Figure 8. Output Voltage vs Output Current
vs Input Voltage for VOUT = 3.3 V (Power Saver Mode)
TPS62590-Q1 pfm_lt2_lvs764.gif
Figure 10. PWM Load Transient
TPS62590-Q1 pfm_ltr2_lvs764.gif
Figure 12. PWM Line Transient
TPS62590-Q1 typ_opr_pwm_lvs764.gif
Figure 14. Typical Performance – PWM Mode
TPS62590-Q1 iq_v_vin_lvs897.gif
Figure 16. Quiescent Current vs Input Voltage
TPS62590-Q1 rds_ls_vin_lvs897.gif
Figure 18. Static Drain-Source On-State Resistance vs Input Voltage