SLUSEC8B March 2021 – April 2024 TPS628501 , TPS628502 , TPS628503
PRODUCTION DATA
The architecture of the TPS62850x allows the use of tiny ceramic output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep the low resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends to use X7R or X5R dielectric. Using a higher value has advantages, like smaller voltage ripple and a tighter DC output accuracy in power save mode.
The COMP/FSET pin allows the user to select two different compensation settings based on the minimum capacitance used on the output. The maximum capacitance is 200 µF in any of the compensation settings. The minimum capacitance required on the output depends on the compensation setting and output voltage.
For output voltages below 1 V, the minimum increases linearly from 10 µF at 1 V to 15 µF at 0.6 V with the compensation setting for smallest output capacitance. Other compensation ranges are equivalent. See Table 8-1 for details.