SLUSFG2A September   2024  – November 2024 TPS6286A06 , TPS6286B10

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Rating
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode (PFM)
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Low Dropout Operation (100% Duty Cycle)
      4. 7.3.4 Soft Start
      5. 7.3.5 Switch Current Limit and HICCUP Short-Circuit Protection
      6. 7.3.6 Undervoltage Lockout
      7. 7.3.7 Thermal Warning and Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Output Discharge
      3. 7.4.3 Power Good (PG)
      4. 7.4.4 Voltage Setting and Mode Selection (VSET/MODE), TPS6286Axx Devices
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-, Fast-, and Fast-Mode Plus Protocol
      3. 7.5.3 HS Mode Protocol
      4. 7.5.4 I2C Update Sequence
      5. 7.5.5 I2C Register Reset
  9. 8 Register Map
    1. 8.1 Target Address Byte
    2. 8.2 Register Address Byte
    3. 8.3 VOUT Register
    4. 8.4 CONTROL Register
    5. 8.5 STATUS Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Setting the Output Voltage
        3. 9.2.2.3 Output Filter Design
        4. 9.2.2.4 Inductor Selection
        5. 9.2.2.5 Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • VBM|13
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.4 Voltage Setting and Mode Selection (VSET/MODE), TPS6286Axx Devices

The TPS6286Axx devices are configurable as either an adjustable output voltage or a fixed output voltage, depending on the needs of each individual application. This feature simplifies the logistics during mass production, as one part number offers several fixed output voltage options as well as an adjustable output voltage option.

During the enable delay (tDelay), the device configuration is set by an external resistor connected to the VSET/MODE pin through an internal R2D (resistor to digital) converter. Table 7-2 shows the options. This configures the positive input to the error amplifier (EA) to be either the VFB voltage (0.6V typical) or the selected output voltage.

Table 7-2 Voltage Selection Table
RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/MODE PIN, 200ppm/°C OR BETTERFIXED OR ADJUSTABLE OUTPUT VOLTAGE
249kΩ or logic highAdjustable (through a resistive divider on the FB pin)
205kΩ1.60V
162kΩ1.50V
133kΩ1.35V
105kΩ1.20V
86.6kΩReserved
68.1kΩ1.00V
56.2kΩ0.90V
44.2kΩ0.85V
36.5kΩ0.80V
28.7kΩ0.70V
23.7kΩ0.60V
18.7kΩ0.50V
15.4kΩ0.45V
12.1kΩ0.40V
10kΩ or logic lowAdjustable (through a resistive divider on the FB pin)

The R2D converter has an internal current source that applies current through the external resistor and an internal ADC that reads back the resulting voltage level. Depending on the level, the output voltage is set. After this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Make sure that the additional leakage current path is less than 20nA and the capacitance is less than 30pF from this pin to GND during R2D conversion. Otherwise, a false value is set. For more details, refer to Benefits of a Resistor-to-Digital Converter in Ultra-Low Power Supplies white paper.

When the device is set as a fixed output voltage converter, then FB pin must be connected to the output directly. Refer to Figure 7-5.

After the start-up period (tStartup), a different operation mode can be selected. When VSET/MODE is high, the device operates in forced PWM mode. Otherwise, the VSET/MODE resistor pulls the pin low and the device operates in power save mode.

TPS6286A06 TPS6286B10 TPS6286Axx Typical Application - Fixed Output VoltageFigure 7-5 TPS6286Axx Typical Application - Fixed Output Voltage