SLVSFJ3C May   2022  – October 2023 TPS62870-Q1 , TPS62871-Q1 , TPS62872-Q1 , TPS62873-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Device Options
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 I2C Interface Timing Characteristics
    7. 8.7 Timing Requirements
    8. 8.8 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Fixed-Frequency DCS Control Topology
      2. 9.3.2  Forced PWM and Power Save Modes
      3. 9.3.3  Precise Enable
      4. 9.3.4  Start-Up
      5. 9.3.5  Switching Frequency Selection
      6. 9.3.6  Output Voltage Setting
        1. 9.3.6.1 Output Voltage Range
        2. 9.3.6.2 Output Voltage Setpoint
        3. 9.3.6.3 Non-Default Output Voltage Setpoint
        4. 9.3.6.4 Dynamic Voltage Scaling
      7. 9.3.7  Compensation (COMP)
      8. 9.3.8  Mode Selection and Clock Synchronization (MODE/SYNC)
      9. 9.3.9  Spread Spectrum Clocking (SSC)
      10. 9.3.10 Output Discharge
      11. 9.3.11 Undervoltage Lockout (UVLO)
      12. 9.3.12 Overvoltage Lockout (OVLO)
      13. 9.3.13 Overcurrent Protection
        1. 9.3.13.1 Cycle-by-Cycle Current Limiting
        2. 9.3.13.2 Hiccup Mode
        3. 9.3.13.3 Current Limit Mode
      14. 9.3.14 Power Good (PG)
        1. 9.3.14.1 Standalone or Primary Device Behavior
        2. 9.3.14.2 Secondary Device Behavior
      15. 9.3.15 Remote Sense
      16. 9.3.16 Thermal Warning and Shutdown
      17. 9.3.17 Stacked Operation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-On Reset
      2. 9.4.2 Undervoltage Lockout
      3. 9.4.3 Standby
      4. 9.4.4 On
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
      2. 9.5.2 Standard, Fast, Fast Mode Plus Protocol
      3. 9.5.3 I2C Update Sequence
      4. 9.5.4 I2C Register Reset
    6. 9.6 Register Map
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Selecting the Inductor
        2. 10.2.2.2 Selecting the Input Capacitors
        3. 10.2.2.3 Selecting the Compensation Resistor
        4. 10.2.2.4 Selecting the Output Capacitors
        5. 10.2.2.5 Selecting the Compensation Capacitor, CC
        6. 10.2.2.6 Selecting the Compensation Capacitor, CC2
      3. 10.2.3 Application Curves
    3. 10.3 Best Design Practices
    4. 10.4 Power Supply Recommendations
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.3 Application Curves

GUID-6DF22D11-1C63-49EA-93B3-A5997D875C11-low.svg
VOUT = 0.4 V
Figure 10-2 Efficiency
GUID-97111777-A829-4DC5-8AAC-7AA77885E171-low.svg
VOUT = 0.5 V
Figure 10-4 Efficiency
GUID-AC5103EB-A468-4888-9DEE-1B1553AE345B-low.svg
VOUT = 0.75 V
Figure 10-6 Efficiency
GUID-6959FFA9-0DE4-4315-BCED-D2B76AE38F96-low.svg
VOUT = 0.875 V
Figure 10-8 Efficiency
GUID-35C109C2-FE41-4618-88C3-120CF9C5CB15-low.svg
VOUT = 1.05 V
Figure 10-10 Efficiency
GUID-BF64F8CC-28A0-4EE2-A414-5D26D8C1BD6E-low.svg
IOUT = 10 A
Figure 10-12 Line Regulation
GUID-4F7EADEB-DFF0-4DF4-85AE-A0E1C775AEE5-low.png
ΔIOUT = 7.5 ACH1 = 50 mV/A
Figure 10-14 Load Transient Response
GUID-D88485FD-EF8D-4DB7-B65C-B31BE752DD5D-low.png
IOUT = 750 mA
Figure 10-16 PWM-DCM Operation
GUID-20230804-SS0I-BPPD-T77W-L3LBGH9KRWFT-low.svg
VOUT = 0.75 VIOUT = 11.5A
Figure 10-18 Spread Spectrum Operation
GUID-4624C470-FAED-4A5F-B363-5D2547B56D16-low.png
Load = 0.75 Ω
Figure 10-20 Start-Up Using the EN Pin
GUID-972E2C13-B086-4F43-8FB8-78CE2854E63E-low.png
Load = 7.5 Ω
Figure 10-22 Shutdown (Discharge Enabled)
GUID-AF1A6957-A102-46BF-9F78-3728EF0D8171-low.svg
VOUT = 0.4 V
Figure 10-3 Load Regulation
GUID-70FCB828-0D52-4D52-8143-2DA7E30E6520-low.svg
VOUT = 0.5 V
Figure 10-5 Load Regulation
GUID-D44BA7C7-831F-4938-AA84-818CEE823E8A-low.svg
VOUT = 0.75 V
Figure 10-7 Load Regulation
GUID-FAEEFCA4-71E0-4622-9FFA-FCFA12A9452E-low.svg
VOUT = 0.875 V
Figure 10-9 Load Regulation
GUID-F38B661D-77D1-4FD6-80F8-90F3033D666B-low.svg
VOUT = 1.05 V
Figure 10-11 Load Regulation
GUID-8A5523FE-D13E-4A6E-94CB-6ADE5ACCD419-low.pngFigure 10-13 Line Transient Response
GUID-C49D270B-2D37-478E-BB6B-61111F8102C6-low.png
IOUT = 2 A
Figure 10-15 PWM-CCM Operation
GUID-B0B26F64-1828-4518-BA69-9997E0E78E80-low.png
IOUT = 75 mA
Figure 10-17 PFM Operation
GUID-507910B9-6EE8-4728-95C1-2852D55640BF-low.png
 
 
Load = 0.75 ΩFSEL = 2.25 MHzf(SYNC) = 2 MHz
Figure 10-19 Synchronization to an External Clock
GUID-7D45B191-8A3A-4AF0-87CB-C794CB9C8D93-low.png
Load = 7.5 Ω
Figure 10-21 Shutdown Using the EN Pin (Discharge Enabled)
GUID-8FAE316B-55A2-49F3-A6E1-3336C339C083-low.pngFigure 10-23 Current Limit (Hiccup)