SLVSFU1B April 2023 – October 2023 TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1
PRODUCTION DATA
During device initialization, a resistor-to-digital converter in the device determines the state of the FSEL pin and sets the switching frequency of the DC/DC converter according to Table 8-2.
Resistor at FSEL (1%) | Switching Frequency |
---|---|
6.2 kΩ to GND | 1.5 MHz |
Short to GND | 2.25 MHz |
Short to VIN | 2.5 MHz |
47 kΩ to VIN | 3 MHz |
Figure 8-10 shows a simplified block diagram of the R2D converter used to detect the state of the FSEL pin. (An identical circuit detects the state of the VSEL pin – see Table 8-5.)
Detection of the state of the FSEL pin works as follows:
To detect the most significant bit (MSB), the circuit opens S1 and S2, and the input buffer detects if a high or a low level is connected to the FSEL pin.
To detect the least significant bit (LSB):