SLVSFU1B April 2023 – October 2023 TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1
PRODUCTION DATA
Figure 8-15 shows a functional block diagram of the power-good function in a secondary device. During initialization, the device presets FF2, which pulls down the PG pin and forces the devices in a stack to operate in DCM. When the device completes its internal start-up sequence, it resets FF2, which turns off Q1. In a stacked configuration all devices share the same PG signal, and therefore the PG pin stays low until all devices in the stack have completed their start-up. When that happens, FF1 is set and the converters operate in CCM. FF1 and FF2 are pre-set such that DCM is allowed each time the converter is disabled, either by the EN pin, EN bit, thermal shutdown or UVLO.