SLVSFU1D April   2023  – December 2024 TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings - Q100
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency DCS-Control Topology
      2. 8.3.2  Forced-PWM and Power-Save Modes
      3. 8.3.3  Transient Non-Synchronous Mode (optional)
      4. 8.3.4  Precise Enable
      5. 8.3.5  Start-Up
      6. 8.3.6  Switching Frequency Selection
      7. 8.3.7  Output Voltage Setting
        1. 8.3.7.1 Output Voltage Range
        2. 8.3.7.2 Output Voltage Setpoint
        3. 8.3.7.3 Non-Default Output Voltage Setpoint
        4. 8.3.7.4 Dynamic Voltage Scaling
        5. 8.3.7.5 Droop Compensation
      8. 8.3.8  Compensation (COMP)
      9. 8.3.9  Mode Selection / Clock Synchronization (MODE/SYNC)
      10. 8.3.10 Spread Spectrum Clocking (SSC)
      11. 8.3.11 Output Discharge
      12. 8.3.12 Undervoltage Lockout (UVLO)
      13. 8.3.13 Overvoltage Lockout (OVLO)
      14. 8.3.14 Overcurrent Protection
        1. 8.3.14.1 Cycle-by-Cycle Current Limiting
        2. 8.3.14.2 Hiccup Mode
        3. 8.3.14.3 Current-Limit Mode
      15. 8.3.15 Power Good (PG)
        1. 8.3.15.1 Standalone, Primary Device Behavior
        2. 8.3.15.2 Secondary Device Behavior
      16. 8.3.16 Remote Sense
      17. 8.3.17 Thermal Warning and Shutdown
      18. 8.3.18 Stacked Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Undervoltage Lockout
      3. 8.4.3 Standby
      4. 8.4.4 On
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 8.5.3 HS-Mode Protocol
      4. 8.5.4 I2C Update Sequence
      5. 8.5.5 I2C Register Reset
      6. 8.5.6 Dynamic Voltage Scaling (DVS)
  10. Device Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Selecting the Input Capacitors
        3. 10.2.2.3 Selecting the Compensation Resistor
        4. 10.2.2.4 Selecting the Output Capacitors
        5. 10.2.2.5 Selecting the Compensation Capacitor CC
        6. 10.2.2.6 Selecting the Compensation Capacitor CC2
      3. 10.2.3 Application Curves
    3. 10.3 Typical Application Using Two TPS62876-Q1 in a Stacked Configuration
      1. 10.3.1 Design Requirements For Two Stacked Devices
      2. 10.3.2 Detailed Design Procedure
        1. 10.3.2.1 Selecting the Compensation Resistor
        2. 10.3.2.2 Selecting the Output Capacitors
        3. 10.3.2.3 Selecting the Compensation Capacitor CC
      3. 10.3.3 Application Curves for Two Stacked Devices
    4. 10.4 Typical Application Using Three TPS62876-Q1 in a Stacked Configuration
      1. 10.4.1 Design Requirements For Three Stacked Devices
      2. 10.4.2 Detailed Design Procedure
        1. 10.4.2.1 Selecting the Compensation Resistor
        2. 10.4.2.2 Selecting the Output Capacitors
        3. 10.4.2.3 Selecting the Compensation Capacitor CC
      3. 10.4.3 Application Curves for Three Stacked Devices
    5. 10.5 Best Design Practices
    6. 10.6 Power Supply Recommendations
    7. 10.7 Layout
      1. 10.7.1 Layout Guidelines
      2. 10.7.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Options

DEVICE NUMBEROUTPUT CURRENTVSEL SETTING FOR START-UP VOLTAGE AND I2C ADDRESSSSCDEFAULT DROOPTRANS. NONSYNC MODESOFT-START TIME
TPS62874QWRZVRQ115AVSEL with 6.2kΩ to GND: 0.80V, 0x44
VSEL shorted to GND: 0.75V, 0x45
VSEL shorted to VIN: 0.875V, 0x46
VSEL with 47kΩ to VIN: 0.58V, 0x47
OffOffOff1ms
TPS62875QWRZVRQ120AOffOffOff
TPS62876QWRZVRQ125AOffOffOff
TPS62877QWRZVRQ130AOffOffOff
TPS62874B1QWRZVRQ1

15A

VSEL with 6.2kΩ to GND: 0.8V, 0x44
VSEL shorted to GND: 0.8V, 0x45
VSEL shorted to VIN: 0.875V, 0x46
VSEL with 47kΩ to VIN: 0.8V, 0x47

Off

On

On

TPS62875B1QWRZVRQ120A

Off

On

On

TPS62876B1QWRZVRQ125A

Off

On

On

TPS62877B1QWRZVRQ1

30A

OffOnOn
TPS62875B2QWRZVRQ120AVSEL with 6.2kΩ to GND: 0.85V, 0x44
VSEL shorted to GND: 0.75V, 0x45
VSEL shorted to VIN: 0.875V, 0x46
VSEL with 47kΩ to VIN: 0.8V, 0x47

Off

On

On

TPS62875B3QWRZVRQ120AVSEL with 6.2kΩ to GND: 0.73V, 0x44
VSEL shorted to GND: 0.75V, 0x45
VSEL shorted to VIN: 0.8V, 0x46
VSEL with 47kΩ to VIN: 0.77V, 0x47
OnOnOn
TPS62876B3QWRZVRQ1

25A

VSEL with 6.2kΩ to GND: 0.845V, 0x44
VSEL shorted to GND: 0.75V, 0x45
VSEL shorted to VIN: 0.8V, 0x46
VSEL with 47kΩ to VIN: 0.9V, 0x47

On

On

On

TPS62877B3QWRZVRQ1

30A

On

On

On

TPS62874B4QWRZVRQ115AVSEL with 6.2kΩ to GND: 0.7V, 0x44
VSEL shorted to GND: 0.75V, 0x45
VSEL shorted to VIN: 0.765V, 0x46
VSEL with 47kΩ to VIN: 0.85V, 0x47

Off

On

On

TPS62875B4QWRZVRQ1

20A

Off

On

On

TPS62875B5QWRZVRQ120AVSEL with 6.2kΩ to GND: 0.725V, 0x44
VSEL shorted to GND: 0.75V, 0x45
VSEL shorted to VIN: 0.765V, 0x46
VSEL with 47kΩ to VIN: 0.85V, 0x47

Off

On

On

Preview information (not Production Data)