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  • TPS6293x 3.8-V to 30-V, 2-A, 3-A Synchronous Buck Converters in a SOT583 Package

    • SLUSEA4D June   2021  – August 2022 TPS62932 , TPS62933 , TPS62933F , TPS62933O , TPS62933P

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  • TPS6293x 3.8-V to 30-V, 2-A, 3-A Synchronous Buck Converters in a SOT583 Package
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Fixed Frequency Peak Current Mode
      2. 9.3.2  Pulse Frequency Modulation
      3. 9.3.3  Voltage Reference
      4. 9.3.4  Output Voltage Setting
      5. 9.3.5  Switching Frequency Selection
      6. 9.3.6  Enable and Adjusting Undervoltage Lockout
      7. 9.3.7  External Soft Start and Prebiased Soft Start
      8. 9.3.8  Power Good
      9. 9.3.9  Minimum On Time, Minimum Off Time, and Frequency Foldback
      10. 9.3.10 Frequency Spread Spectrum
      11. 9.3.11 Overvoltage Protection
      12. 9.3.12 Overcurrent and Undervoltage Protection
      13. 9.3.13 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Modes Overview
      2. 9.4.2 Heavy Load Operation
      3. 9.4.3 Light Load Operation
      4. 9.4.4 Out of Audio Operation
      5. 9.4.5 Forced Continuous Conduction Operation
      6. 9.4.6 Dropout Operation
      7. 9.4.7 Minimum On-Time Operation
      8. 9.4.8 Shutdown Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design With WEBENCH® Tools
        2. 10.2.2.2  Output Voltage Resistors Selection
        3. 10.2.2.3  Choosing Switching Frequency
        4. 10.2.2.4  Soft-Start Capacitor Selection
        5. 10.2.2.5  Bootstrap Capacitor Selection
        6. 10.2.2.6  Undervoltage Lockout Setpoint
        7. 10.2.2.7  Output Inductor Selection
        8. 10.2.2.8  Output Capacitor Selection
        9. 10.2.2.9  Input Capacitor Selection
        10. 10.2.2.10 Feedforward Capacitor CFF Selection
        11. 10.2.2.11 Maximum Ambient Temperature
      3. 10.2.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
  15. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • DRL|8
    • MPCS002F
Thermal pad, mechanical data (Package|Pins)
Orderable Information
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  • slusea4d_pm
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DATA SHEET

TPS6293x 3.8-V to 30-V, 2-A, 3-A Synchronous Buck Converters in a SOT583 Package

1 Features

  • Configured for a wide range of applications
    • 3.8-V to 30-V input voltage range
    • 0.8-V to 22-V output voltage range
    • Ultra-low quiescent current: 12 μA (TPS62932, TPS62933, and TPS62933P)
    • Integrated 76-mΩ and 32-mΩ MOSFETs
    • 0.8 V ± 1% reference voltage (25°C)
    • Maximum 98% duty cycle operation
    • Precision EN threshold
    • 2-A (TPS62932) and 3-A (TPS62933 and TPS62933x) continuous output current
    • –40°C to 150°C operating junction temperature
  • Numerous pin-compatible options
    • TPS62932, TPS62933, and TPS62933F with the SS pin for adjustable soft-start time
    • TPS62933P and TPS62933O with the PG pin for a power-good indicator
    • TPS62932, TPS62933, and TPS62933P with pulse frequency modulation (PFM) for high light-load efficiency
    • TPS62933F with forced continuous current modulation (FCCM)
    • TPS62933O with out-of-audio (OOA) feature
  • Ease of use and small solution size
    • Peak current control mode with internal compensation
    • 200-kHz to 2.2-MHz selectable frequency
    • EMI friendly with frequency spread spectrum (TPS62932, TPS62933, TPS62933P and TPS62933O)
    • Supports start-up with prebiased output
    • Cycle-by-cycle OC limit for both high-side and low-side MOSFETs
    • Non-latched protections for OTP, OCP, OVP, UVP, and UVLO
    • 1.6-mm × 2.1-mm SOT583 package
  • Create a custom design with the TPS6293x using the WEBENCH® Power Designer

2 Applications

  • Building automation, appliances, industrial PC
  • Multifunction printers, enterprise projectors
  • Portable electronics, connected peripherals
  • Smart speakers, monitors
  • Distributed power systems with 5-V, 12-V, 19-V, and 24-V input

3 Description

The TPS6293x is a high-efficiency, easy-to-use synchronous buck converter with a wide input voltage range of 3.8 V to 30 V, and supports up to 2-A (TPS62932) and 3-A (TPS62933 and TPS62933x) continuous output current and 0.8-V to 22-V output voltage.

The device employs fixed-frequency peak current control mode for fast transient response and good line and load regulation. The optimized internal loop compensation eliminates external compensation components.

The TPS62932, TPS62933, and TPS62933P operate in pulse frequency modulation for high light load efficiency. The TPS62933F operates in forced continuous current modulation which maintains lower output ripple during all load conditions. The TPS62933O operates in out of audio mode to avoid audible noise.

Device Information
Part Number Package(1) Body Size (NOM)
TPS6293x SOT583 (8) 1.60 mm × 2.10 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-20210110-CA0I-PGXQ-ZBJB-ZP7VSRF6R4CM-low.gif Simplified Schematic
TPS62933 Efficiency, VIN = 24 V, fSW = 500 kHz

4 Revision History

Changes from Revision C (July 2022) to Revision D (August 2022)

  • Added the TPS62933OGo
  • Changed link of WEBENCH® Power Designer for TPS6293xGo

Changes from Revision B (February 2022) to Revision C (July 2022)

  • Added the TPS62933FGo
  • Added the TPS62933PGo

5 Description (continued)

The ULQ (ultra-low quiescent) feature is beneficial for long battery lifetime. The switching frequency can be set by the configuration of the RT pin in the range of 200 kHz to 2.2 MHz, which can optimize system efficiency, solution size, and bandwidth. The soft-start time of the TPS62932, TPS62933, and TPS62933F can be adjusted by the external capacitor at the SS pin. The TPS62932, TPS62933, TPS62933P and TPS62933O are featured with frequency spread spectrum, which helps with lowering down EMI noise.

The TPS6293x is in a small SOT583 (1.6 mm × 2.1 mm) package with 0.5-mm pin pitch, and has an optimized pinout for easy PCB layout and promotes good EMI performance.

6 Device Comparison Table

Part Number Output Current PFM or FCCM or OOA SS or PG Pin
TPS62932

2 A

 PFM SS
TPS62933

3 A

 PFM SS
TPS62933F 3 A FCCM SS
TPS62933P 3 A PFM PG
TPS62933O 3 A OOA PG

7 Pin Configuration and Functions

Figure 7-1 TPS62932, TPS62933, and TPS62933F 8-Pin SOT583DRL Package(Top View)
Figure 7-2 TPS62933P and TPS62933O 8-Pin SOT583DRL Package(Top View)
Table 7-1 Pin Functions
Pin Type(1) Description
Name NO.
RT 1 A Frequency programming input. Float for 500 kHz, tie to GND for 1.2 MHz, or connect to an RT timing resistor. See Section 9.3.5 for details.
EN 2 A Enable input to the converter. Driving EN high or leaving this pin floating enables the converter. An external resistor divider can be used to implement an adjustable VIN UVLO function.
VIN 3 P Supply input pin to internal LDO and high-side FET. Input bypass capacitors must be directly connected to this pin and GND.
GND 4 G Ground pin. Connected to the source of the low-side FET as well as the ground pin for the controller circuit. Connect to system ground and the ground side of CIN and COUT. The path to CIN must be as short as possible.
SW 5 P Switching output of the convertor. Internally connected to the source of the high-side FET and drain of the low-side FET. Connect to the power inductor.
BST 6 P Bootstrap capacitor connection for high-side FET driver. Connect a high-quality, 100-nF ceramic capacitor from this pin to the SW pin.
SS/PG 7 A TPS62932, TPS62933, and TPS62933F soft-start control pin. An external capacitor connected to this pin sets the internal voltage reference rising time. See Section 9.3.7 for details. A minimum 6.8-nF ceramic capacitor must be connected at this pin, which sets the minimum soft-start time to approximately 1 ms. Do not float.
A TPS62933P and TPS62933O open-drain power good indicator, which is asserted low if output voltage is out of PG threshold, overvoltage, or if the device is under thermal shutdown, EN shutdown, or during soft start.
FB 8 A Output feedback input. Connect FB to the tap of an external resistor divider from the output to GND to set output voltage.
(1) A = Analog, P = Power, G = Ground

8 Specifications

8.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range of –40°C to +150°C , unless otherwise noted(1)
MINMAXUNIT
Input voltageVIN–0.332V
EN–0.36
FB–0.36
Output voltageSW, DC–0.332
SW, transient < 10 ns–333
BST–0.3SW + 6
BST–SW–0.36
SS/PG–0.36
RT–0.36
TJOperating junction temperature(2)–40150°C
TstgStorage temperature –65150
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) Operating at junction temperatures greater than 150°C, although possible, degrades the lifetime of the device.

8.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

Over the recommended operating junction temperature range of –40°C to +150°C, unless otherwise noted(1)
MIN NOM MAX UNIT
Input voltage VIN 3.8 30 V
EN –0.1 5.5
FB –0.1 5.5
PG –0.1 5.5
Output voltage VOUT 0.8 22
SW, DC –0.1 30
SW, transient < 10 ns –3 32
BST –0.1 SW + 5.5
BST-SW –0.1 5.5
Ouput current IOUT TPS62933, TPS62933x 0 3 A
TPS62932 0 2
Temperature Operating junction temperature, TJ –40 150 °C
(1) The Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For compliant specifications, see the Electrical Characteristics.

8.4 Thermal Information

THERMAL METRIC(1)TPS6293xUNIT
DRL (SOT583), 8 PINS
JEDEC(2)EVM(3)
RθJAJunction-to-ambient thermal resistance112.2N/A°C/W
RθJC(top)Junction-to-case (top) thermal resistance29.1N/A°C/W
RθJBJunction-to-board thermal resistance19.3N/A°C/W
ΨJTJunction-to-top characterization parameter1.6N/A°C/W
ΨJBJunction-to-board characterization parameter19.2N/A°C/W
RθJA_EVMJunction-to-ambient thermal resistance on official EVM boardN/A60.2°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) The value of RθJA given in this table is only valid for comparison with other packages and can not be used for design purposes. These values were simulated on a standard JEDEC board. They do not represent the performance obtained in an actual application.
(3) The real RθJA is tested on TI EVM (2 layer, 2-ounce copper thickness).

8.5 Electrical Characteristics

The electrical ratings specified in this section apply to all specifications in this document, unless otherwise noted. These specifications are interpreted as conditions that do not degrade the device parametric or functional specifications for the life of the product containing it. TJ = –40°C to +150°C, VIN = 3.8 V to 30 V, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLY (VIN PIN)
VINOperation input voltage3.830V
IQNonswitching quiescent currentEN = 5 V, VFB = 0.85 V, TPS62932, TPS62933, and TPS62933P 12µA
EN = 5 V, VFB = 1 V, TPS62933F 125
EN = 5 V, VFB = 1 V, TPS62933O 45
ISHDNShutdown supply currentVEN = 0 V2µA
VIN_UVLOInput undervoltage lockout thresholdsRising threshold3.43.63.8V
Falling threshold3.13.33.5V
Hysteresis300mV
ENABLE (EN PIN)
VEN_RISEEnable thresholdRising enable threshold1.211.28V
VEN_FALL

Disable threshold

Falling disable threshold1.11.17V
IpEN pullup currentVEN = 1.0 V0.7µA
IhEN pullup hysteresis currentVEN = 1.5 V1.4µA
VOLTAGE REFERENCE (FB PIN)
VFBFB voltageTJ = 25°C792800808mV
TJ = 0°C to 85°C788800812mV
TJ = –40°C to 150°C784800816mV
IFBInput leakage currentVFB = 0.8 V0.15μA
INTEGRATED POWER MOSFETS
RDSON_HSHigh-side MOSFET on-resistanceTJ = 25°C, VBST – SW = 5 V 76mΩ
RDSON_LSLow-side MOSFET on-resistanceTJ = 25°C 32mΩ
CURRENT LIMIT
IHS_LIMITHigh-side MOSFET current limitTPS62933 and TPS62933x4.255.8A
TPS62932 2.8 3.4 4
ILS_LIMITLow-side MOSFET current limitTPS62933 and TPS62933x2.93.84.5A
TPS62932 22.5

3

ILS_NOC Reverse current limit TPS62933F 1.2 2.4 3.6 A
IPEAK_MINMinimum peak inductor currentTPS62933, TPS62933P, and TPS62933O0.75A
TPS629320.53
SOFT START (SS PIN)
ISSSoft-start charge current TPS62932, TPS62933, and TPS62933F4.55.56.5μA
TSS Fixed internal soft-start time TPS62933P and TPS62933O 2 ms
POWER GOOD (PG PIN)
VPGTH PG threshold, VFB percentage VFB falling, PG high to low 85%
VFB rising, PG low to high 90%
VFB falling, PG low to high 110%
VFB rising, PG high to low 115%
TPG_R PG delay time PG from low to high 70 μs
TPG_F PG delay time PG from high to low 18 μs
VIN_PG_VALID Minimum VIN for valid PG output Measured when PG < 0.5 V with 100-kΩ pullup to external 5 V 2 2.5 V
VPG_OL PG output low-level voltage IPG = 0.5 mA 0.3 V
IPG_LK PG leakage current when open drain is high VPG = 5.5 V –1 1 μA
OSCILLATOR FREQUENCY (RT PIN)
fSWSwitching center frequencyRT = floating 450500550kHz
RT = GND 100012001350
RT = 71.5 kΩ 310
RT = 9.09 kΩ 2100
fSW_min Minimum switching frequency TPS62933O 30 kHz
tON_MIN(1)Minimum ON pulse width70ns
tOFF_MIN(1)Minimum OFF pulse width140ns
tON_MAX(1)Maximum ON pulse width7μs
OUTPUT OVERVOLTAGE AND UNDERVOLTAGE PROTECTION
VOVPOutput OVP thresholdOVP detect (L→H) 112%115%118%
Hysteresis 5%
VUVPOutput UVP thresholdUVP detect (H→L)65%
thiccup_ONUV hiccup ON time before entering hiccup mode after soft start ends256μs
thiccup_OFFUV hiccup OFF time before restart10.5 × tSSs
THERMAL SHUTDOWN
TSHDN(1)Thermal shutdown threshold Shutdown temperature165°C
THYS(1)Hysteresis30°C
SPREAD SPECTRUM FREQUENCY
fmModulation frequencyfSW / 128kHz
fspreadInternal spread oscillator frequency±6%
(1) Not production tested, specified by design.

 
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