SLVSAM8D July   2013  – August 2019 TPS63050 , TPS63051

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic (WCSP)
      2.      Efficiency vs Output Current
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Power Good
      2. 8.3.2 Overvoltage Protection
      3. 8.3.3 Undervoltage Lockout (UVLO)
      4. 8.3.4 Thermal Shutdown
      5. 8.3.5 Soft Start
      6. 8.3.6 Short Circuit Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Control Loop Description
      2. 8.4.2 Power Save Mode Operation
      3. 8.4.3 Adjustable Current Limit
      4. 8.4.4 Device Enable
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Output Filter Design
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Capacitor selection
          1. 9.2.2.4.1 Input Capacitor
          2. 9.2.2.4.2 Output Capacitor
        5. 9.2.2.5 Setting the Output Voltage
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example (WCSP)
    3. 11.3 Layout Example (HotRod)
    4. 11.4 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Custom Design With WEBENCH® Tools
    2. 12.2 Device Support
      1. 12.2.1 Third-Party Products Disclaimer
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

VIN = 3.6 V, TJ = –40°C to 125°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range 2.5 5.5 V
VIN_Min Minimum input voltage to turn on in full load IOUT = 500 mA 2.7 V
IOUT Output current(3) ILIM0 = VIH, ILIM1 = VIH, 500 mA
IQ Quiescent current (2) VIN IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V		 43 65 μA
VOUT IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V		 10
Isd Shutdown current (2) EN = 0 V 0.1 1 μA
UVLOTH Undervoltage lockout threshold VIN falling 1.6 1.7 1.8 V
UVLOhys Undervoltage lockout hysteresis 200 mV
TSD Thermal shutdown Temperature rising 140 °C
TSD(hys) Thermal shutdown hysteresis 20 °C
LOGIC SIGNALS EN, ILIM0, ILIM1
VIH High level input voltage VIN = 2.5 V to 5.5 V 1.2 V
VIL Low level voltage Input Voltage VIN = 2.5 V to 5.5 V 0.3 V
Ilkg Input leakage current PFM / PWM, EN, ILIM0, ILIM1 = GND or VIN 0.01 0.1 μA
POWER GOOD
VOL Low level voltage Isink = 100 μA 0.3 V
IPG PG sinking current V = 0.3 V 0.1 mA
Ilkg Input leakage current VPG = 3.6 V 0.01 0.1 μA
OUTPUT
VOUT Output voltage range 2.5 5.5 V
VFB TPS63050 feedback regulation voltage 0.8 V
VFB TPS63050 feedback voltage accuracy PWM mode –1.1% 1.1%
VFB TPS63050 feedback voltage accuracy(1) PFM mode –1% 3%
VOUT TPS63051 output voltage accuracy PWM mode 3.27 3.3 3.34 V
VOUT TPS63051 output voltage accuracy(1) PFM mode 3.27 3.3 3.39 V
IPWM->PFM Minimum output current to enter PFM mode VIN = 3 V; VOUT = 3.3 V 150 mA
IFB TPS63050 feedback input bias current VFB = 0.8 V 10 100 nA
RDS(on) Input high-side FET on-resistance ISW = 500 mA 145 mΩ
Output high-side FET on-resistance ISW = 500 mA 95 mΩ
Input low-side FET on-resistance ISW = 500 mA 170 mΩ
Output low-side FET on-resistance ISW = 500 mA 115 mΩ
IIN_MAX Input current-limit boost mode ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 3 V, VOUT = 3 V 480 1240 mA
ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 3.3 V, VOUT = 3.3 V, 550 1400 mA
ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 4.5 V, VOUT = 4.5 V, 630 1950 mA
ISS_IN Programmable inrush current limit(4) ILIM0 = VIL, ILIM1 = VIL,
VIN = 3 V,VOUT = 3.3 V, (Available for DBGA only)		 0.4×IIN_MAX mA
ILIM0 = VIH, ILIM1 = VIL,
VIN = 3 V,VOUT = 3.3 V, (Available for DBGA only)		 0.5×IIN_MAX
ILIM0 = VIL, ILIM1 = VIH,
VIN = 3 V,VOUT = 3.3 V		 0.65×IIN_MAX
ILIM0 = VIH, ILIM1 = VIH,
VIN = 3 V,VOUT = 3.3 V		 IIN_MAX
ISS Soft-start current TPS63051 1 μA
ISS Soft-start current TPS63050 3.2 μA
Line regulation VIN = 2.5 V to 5.5 V, IOUT = 500 mA, PWM mode 0.963 mV/V
Load regulation VIN = 3.6 V, IOUT = 0 mA to 500 mA, PWM mode 4 mV/A
(1) Conditions: f = 2.5 MHz, L = 1.5 µH, COUT = 10 µF
(2) Conditions: TJ = –40°C to 85°C
(3) For minimum and maximum output current in a specific working point see Figure 1 and Figure 2; and Equation 1 through Equation 4.
(4) For variation of this parameter with Input voltage see Figure 3.