fMAX |
Clock frequency |
|
400 |
kHz |
twH(HIGH) |
Clock high time |
600 |
|
ns |
twL(LOW) |
Clock low time |
1300 |
|
ns |
tr |
DATA and CLK rise time |
|
300 |
ns |
tf |
DATA and CLK fall time |
|
300 |
ns |
th(STA) |
Hold time (repeated) START condition (after this period the first clock pulse is generated) |
600 |
|
ns |
th(DATA) |
Setup time for repeated START condition |
600 |
|
ns |
th(DATA) |
Data input hold time |
300 |
|
ns |
tsu(DATA) |
Data input setup time |
300 |
|
ns |
tsu(STO) |
STOP condition setup time |
600 |
|
ns |
t(BUF) |
Bus free time |
1300 |
|
ns |