SLVSD80D November   2015  – May 2021 TPS65235

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Converter
      2. 7.3.2  Linear Regulator and Current Limit
      3. 7.3.3  Boost Converter Current Limit
      4. 7.3.4  Charge Pump
      5. 7.3.5  Slew Rate Control
      6. 7.3.6  Short Circuit Protection, Hiccup and Overtemperature Protection
      7. 7.3.7  Tone Generation
      8. 7.3.8  Tone Detection
      9. 7.3.9  Disable and Enable
      10. 7.3.10 Component Selection
        1. 7.3.10.1 Boost Inductor
        2. 7.3.10.2 Capacitor Selection
        3. 7.3.10.3 Surge Components
        4. 7.3.10.4 Consideration for Boost Filtering and LNB Noise
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 TPS65235 I2C Update Sequence
    6. 7.6 Register Maps
      1. 7.6.1 Control Register 1 (address = 0x00H) [reset = 00010000]
      2. 7.6.2 Control Register 2 (address = 0x01H) [reset = 0000101]
      3. 7.6.3 Status Register (address = 0x02H) [reset = x0100000]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application for DiSEqc1.x Support
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application for DiSEqc2.x Support
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Boost Converter

The TPS65235 consists of an internal compensated boost converter and linear regulator. The boost converter tracks the LNB output voltage within 800 mV even at loading 1000 mA, which minimizes power loss. When the input voltage VIN is greater than the expected output voltage VLNB, the linear regulator drops the voltage difference between VIN and VLNB, which causes the lower efficiency and the higher power loss on the internal linear regulator if the current loading is high. For this application, care must be taken to ensure that the safe operating temperature range of the TPS65235 is not exceeded. Recommend to work at force PWM mode when VIN > VOUT to reduce output ripple.

As default, the boost converter operates at 1 MHz. TPS65235 has internal cycle-by-cycle peak current limit in the boost converter and DC current limit in the LNB output to protect the IC against short circuits and over loading. When the LNB output is shorted to ground, the LNB output current is clamped at the LDO current limit. The LDO current limit is set by the external resistor at ISET pin; meanwhile the Boost switch current limit is proportional with LDO current limit. If overcurrent condition lasts for more than 4 ms, the Boost converter enters hiccup mode and will re-try startup in 128 ms. This hiccup mode ON/OFF time can be selectable by I2C control register 0x01, either 4 ms / 128 ms or 8 ms / 256 ms. At extremely light loads, the boost converter operates in a pulse-skipping mode automatically.

Boost converter is stable with either ceramic capacitor or electrolytic capacitor.

If two or more set top box LNB outputs are connected together, one output voltage could be set higher than others. The output with lower set voltage would be effectively turned off. Once the voltage drops to the set level, the LNB output with lower set output voltage returns to normal conditions.