SLVSCS9D december   2014  – may 2023 TPS65263-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Enable and Adjusting UVLO
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Power-Up Sequencing
      5. 7.3.5  V7V Low-Dropout Regulator and Bootstrap
      6. 7.3.6  Out-of-Phase Operation
      7. 7.3.7  Output Overvoltage Protection (OVP)
      8. 7.3.8  PSM
      9. 7.3.9  Slope Compensation
      10. 7.3.10 Overcurrent Protection
        1. 7.3.10.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.10.2 Low-Side MOSFET Overcurrent Protection
      11. 7.3.11 Power Good
        1. 7.3.11.1 Adjustable Switching Frequency
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface Description
      2. 7.4.2 I2C Update Sequence
    5. 7.5 Register Maps
      1. 7.5.1 VOUT2_SEL: Vout2 Voltage Selection Register (Address = 0x01H)
      2. 7.5.2 VOUT1_COM: Buck1 Command Register (offset = 0x03H)
      3. 7.5.3 VOUT2_COM: Buck2 Command Register (offset = 0x04H)
      4. 7.5.4 VOUT3_COM: Buck3 Command Register (offset = 0x05H)
      5. 7.5.5 SYS_STATUS: System Status Register (offset = 0x06H)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from Revision C (November 2015) to Revision D (May 2023)

  • Added the word "automotive" to the data sheet titleGo
  • Updated the numbering format for tables, figures, and cross-references throughout the document Go
  • Removed color from images throughout the documentGo
  • Change description of V7V pin in Table 5-1 Go
  • Update the ESD table to be in accordance with automotive specification.Go
  • Changed the recommended value of capacitor from V7V pin to power ground in V7V Low-Dropout Regulator and Bootstrap .Go
  • Changed all instances of legacy terminology to controller and target where I2C is mentioned.Go
  • Changed recommended value of C9 in Figure 8-1.Go

Changes from Revision B (January 2015) to Revision C (November 2015)

  • Added more pin information for SDA and SCL Go
  • Added more information about SDA and SCL pins Go
  • Added Community Resources Go

Changes from Revision A (January 2015) to Revision B (January 2015)

  • Updated device status to production data Go

Changes from Revision * (December 2014) to Revision A (January 2015)

  • Changed feedback reference voltage from 0.6 V ±2% to 0.6 V ±1% in Features Go
  • Updated values for feedback voltage, PGOOD pin leakage, V7V LDO output voltage, buck1 low-side sink current limit, and buck2/buck3 low-side sink current limit in Electrical Characteristics Go
  • Updated current value in Section 7.3.8 , Equation 6, and Figure 7-10 Go