SLVSBK1E September   2012  – May 2014 TPS65631

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Boost Converter
      2. 8.3.2 Inverting Buck-Boost Converter
        1. 8.3.2.1 Programming VNEG
        2. 8.3.2.2 Controlling the VNEG Transition Time
      3. 8.3.3 Soft-Start and Start-Up Sequence
      4. 8.3.4 Enable (CTRL)
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Short Circuit Protection
        1. 8.3.6.1 Short-Circuits During Normal Operation
        2. 8.3.6.2 Short-Circuits During Start-Up
      7. 8.3.7 Output Discharge During Shutdown
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with VI < 2.9 V
      2. 8.4.2 Operation with VI ≈ VPOS (Diode Mode)
      3. 8.4.3 Operation with CTRL
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Capacitor Selection
        3. 9.2.2.3 Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Revision History

DATE REVISION NOTES
May 2014 E No legacy rev history for rev E – first public release

Changes from D Revision (November 2012) to E Revision

  • Changed the data sheet to the new TI layout.Go
  • Changed the Features ListGo
  • Added the Device Information tableGo
  • Changed the Simplified Schematic and added the Efficiency vs Output Current graph Go
  • Added the pinout Bottom View Go
  • Added the Handling Ratings tableGo
  • Added Output voltage range to the ROC table Go
  • Added Output current range to the ROC table Go
  • Changed the Typical Characteristics graphsGo

Changes from C Revision (October 2012) to D Revision

  • Changed the Absolute Maximum Ratings of SWP, OUTP, FBS, PVIN, AVIN From: 5.5 V, To: 6 V Go
  • Changed the Absolute Maximum Rating of OUTN From: -6.5 V, To: -6 V Go
  • Changed the Absolute Maximum Rating of SWN From: -6.5 ~ 4.8V, To: -6 ~ 6 V Go

Changes from B Revision (October 2012) to C Revision

Changes from A Revision (October 2012) to B Revision

  • Changed pin description of pin 6 Go
  • Changed the Layout ExampleGo

Changes from * Revision (September 2012) to A Revision

  • Changed feature From: 300 mA Output Current for VPOS and VNEG To: Minimum 250mA Output CurrentGo