SLVSAI6A June   2011  – January 2016 TPS65735

PRODUCTION DATA.  

  1. 1 Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2 Revision History
  3. 3 Terminal Configuration and Functions
    1. 3.1 Pin Diagram
    2. 3.2 Pin Functions
  4. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Power-On Hours (POH)
    4. 4.4 Recommended Operating Conditions
    5. 4.5 Thermal Information
    6. 4.6 Electrical Characteristics
    7. 4.7 Quiescent Current
    8. 4.8 Typical Characteristics
  5. 5 Detailed Description
    1. 5.1 Overview
    2. 5.2 Functional Block Diagram
    3. 5.3 Feature Description
      1. 5.3.1 System Operation
        1. 5.3.1.1 System Power Up
        2. 5.3.1.2 System Operation Using Push Button Switch
        3. 5.3.1.3 System Operation Using Slider Switch
      2. 5.3.2 Linear Charger Operation
        1. 5.3.2.1 Battery and TS Detection
        2. 5.3.2.2 Battery Charging
          1. 5.3.2.2.1 Pre-charge
          2. 5.3.2.2.2 Charge Termination
          3. 5.3.2.2.3 Recharge
          4. 5.3.2.2.4 Charge Timers
        3. 5.3.2.3 Charger Status (nCHG_STAT Pin)
      3. 5.3.3 LDO Operation
        1. 5.3.3.1 LDO Internal Current Limit
      4. 5.3.4 Boost Converter Operation
        1. 5.3.4.1 Boost Thermal Shutdown
        2. 5.3.4.2 Boost Load Disconnect
      5. 5.3.5 Full H-Bridge Analog Switches
        1. 5.3.5.1 H-Bridge Switch Control
      6. 5.3.6 Power Management Core Control
        1. 5.3.6.1 SLEEP / Power Control Pin Function
        2. 5.3.6.2 COMP Pin Functionality
        3. 5.3.6.3 SW_SEL Pin Functionality
        4. 5.3.6.4 SWITCH Pin
        5. 5.3.6.5 Slider Switch Behavior
        6. 5.3.6.6 Push-Button Switch Behavior
    4. 5.4 Device Functional Modes
      1. 5.4.1 SLEEP State
      2. 5.4.2 NORMAL Operating Mode
  6. 6 Application and Implementation
    1. 6.1 Application Information
    2. 6.2 Typical Application
      1. 6.2.1 Active Shutter 3D Glasses
        1. 6.2.1.1 Design Requirements
        2. 6.2.1.2 Detailed Design Procedure
          1. 6.2.1.2.1 Reducing System Quiescent Current (IQ)
          2. 6.2.1.2.2 Boost Converter Application Information
            1. 6.2.1.2.2.1 Setting Boost Output Voltage
            2. 6.2.1.2.2.2 Boost Inductor Selection
            3. 6.2.1.2.2.3 Boost Capacitor Selection
          3. 6.2.1.2.3 Bypassing Default Push-Button SWITCH Functionality
        3. 6.2.1.3 Application Curves
  7. 7  Power Supply Recommendations
  8. 8 Layout
    1. 8.1 Layout Guidelines
    2. 8.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Community Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Terminal Configuration and Functions

3.1 Pin Diagram

TPS65735 TPS65735_Pinout.gif
A. Pins 14 and 17 = N/C. No internal connection; connect to main system ground.
Figure 3-1 32-Pin RSN WQFN (Top View)

3.2 Pin Functions

Table 3-1 Pin Functions

PIN I/O DESCRIPTION
NO. NAME
POWER MANAGEMENT CORE (PMIC)
1 BST_EN I Boost Enable Input from an MCU, High = Boost Enabled
2 DGND — Digital Ground
3 LCLP O H-Bridge Output for Left LC Shutter, Positive Terminal
4 LCLN O H-Bridge Output for Left LC Shutter, Negative Terminal
5 LCRP O H-Bridge Output for Right LC Shutter, Positive Terminal
6 LCRN O H-Bridge Output for Right LC Shutter, Negative Terminal
7 HBL2 I H-Bridge Input 2 for Left LC Shutter
8 HBR1 I H-Bridge Input 1 for Right LC Shutter
9 HBR2 I H-Bridge Input 2 for Right LC Shutter
10 BST_OUT O Boost Output
11 BST_SW O Boost Switch Node
12 PGNDBST — Boost Power Ground
13 BST_FB I Boost Feedback Node
15 ISET I/O Fast-Charge Current Setting Resistor
16 TS I Pin for 10-kΩ NTC Thermistor Connection
FLOAT IF THERMISTOR / TS FUNCTION IS NOT USED
18 BAT I/O Charger Power Stage Output and Battery Voltage Sense Input
19 SYS O Output Terminal to System
20 VIN I AC or USB Adapter Input
21 VLDO O LDO Output
22 VLDO_SET I Sets LDO Output Voltage (see Table 5-2)
23 COMP O Scaled Battery Voltage for MCU Comparator or ADC Input (Battery Voltage Monitoring)
DO NOT CONNECT IF COMP FUNCTION IS NOT USED
24 AGND - Analog Ground
25 SWITCH I Switch Input for Device Power On/Off
26 SW_SEL I Selects Type of Switch Connected to SWITCH Pin (see Table 5-6)
27 PSDA I/O I2C Data Pin (only used for TI debug and test)
GROUND PIN IN APPLICATION
28 PSCL I/O I2C Clock Pin (only used for TI debug and test)
GROUND PIN IN APPLICATION
29 nCHG_STAT O Open-drain Output, Charge Status Indication
CONNECT TO GROUND IF FUNCTION IS NOT USED
30 CHG_EN I Charger Enable Input from an MCU, High = Boost Enabled
31 SLEEP I/O Sleep Enable Input from an MCU (edge triggered, only for system shutdown)
32 HBL1 I H-Bridge Input 1 for Left LC Shutter
MISCELLANEOUS AND PACKAGE
14, 17 N/C — All N/C should be connected to the main system ground.
33 Thermal PAD — There is an internal electrical connection between the exposed thermal pad and the AGND ground pin of the device. The thermal pad must be connected to the same potential as the AGND pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. AGND pin must be connected to ground at all times.