SBVS399A December   2021  – May 2022 TPS7A13

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excellent Transient Response
      2. 7.3.2 Global Undervoltage Lockout (UVLO)
      3. 7.3.3 Enable Input
      4. 7.3.4 Internal Foldback Current Limit
      5. 7.3.5 Active Discharge
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disable Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Recommended Capacitor Types
      2. 8.1.2  Input, Output, and Bias Capacitor Requirements
      3. 8.1.3  Dropout Voltage
      4. 8.1.4  Behavior During Transition From Dropout Into Regulation
      5. 8.1.5  Device Enable Sequencing Requirement
      6. 8.1.6  Load Transient Response
      7. 8.1.7  Undervoltage Lockout Circuit Operation
      8. 8.1.8  Power Dissipation (PD)
      9. 8.1.9  Estimating Junction Temperature
      10. 8.1.10 Recommended Area for Continuous Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.9 Estimating Junction Temperature

The JEDEC standard now recommends the use of psi (Ψ) thermal metrics to estimate the junction temperatures of the LDO when in-circuit on a typical PCB board application. These metrics are not strictly speaking thermal resistances, but rather offer practical and relative means of estimating junction temperatures. These psi metrics are determined to be significantly independent of the copper-spreading area. The key thermal metrics (ΨJT and ΨJB) are used in accordance with Equation 7 and are given in the Section 6.5 table.

Equation 7. ΨJT : TJ = TT + ΨJT × PD and ΨJB : TJ = TB + ΨJB × PD

where:

  • PD is the power dissipated as explained in Equation 3 and the Section 8.1.8 section
  • TT is the temperature at the center-top of the device package
  • TB is the PCB surface temperature measured 1 mm from the device package and centered on the package edge