SBVS398A December 2021 – September 2022 TPS7A21
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PIN | I/O | DESCRIPTION | |
---|---|---|---|
DSBGA | NAME | ||
A1 | IN | I | Input voltage supply. For best transient response and to minimize input impedance, use the recommended value or larger capacitor from IN to GND, as listed in the Section 6.3 table. Place the input capacitor as close to the IN and GND pins of the device as possible. |
A2 | OUT | O | Regulated output voltage. Connect a low-equivalent series resistance (ESR) capacitor to this pin. For best transient response, use the nominal recommended value or larger capacitor from OUT to GND. An internal 150-Ω (typical) pulldown resistor prevents a charge from remaining on OUT when the regulator is in shutdown mode (VEN< VEN(LOW)). |
B1 | EN | I | Enable input. A low voltage (VEN < VEN(LOW)) on this pin turns the regulator off and discharges the output pin to GND through an internal 150-Ω pulldown resistor. A high voltage (VEN > VEN(HI)) on this pin enables the regulator output. This pin has an internal 450-kΩ pulldown resistor to hold the regulator off by default. When VEN > VEN(HI), the 450-kΩ pulldown resistor is disconnected to reduce input current. |
B2 | GND | — | Common ground. |