SBVS233B January   2016  – June 2021 TPS7A84

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Low-Noise, High-PSRR Output
      2. 7.3.2  Integrated Resistance Network (ANY-OUT)
      3. 7.3.3  Bias Rail
      4. 7.3.4  Power-Good Function
      5. 7.3.5  Programmable Soft-Start
      6. 7.3.6  Internal Current Limit (ILIM)
      7. 7.3.7  Enable
      8. 7.3.8  Active Discharge Circuit
      9. 7.3.9  Undervoltage Lockout (UVLO)
      10. 7.3.10 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with 1.1 V ≤ VIN < 1.4 V
      2. 7.4.2 Operation with 1.4 V ≤ VIN ≤ 6.5 V
      3. 7.4.3 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Recommended Capacitor Types
      2. 8.1.2  Input and Output Capacitor Requirements (CIN and COUT)
      3. 8.1.3  Noise-Reduction and Soft-Start Capacitor (CNR/SS)
      4. 8.1.4  Feed-Forward Capacitor (CFF)
      5. 8.1.5  Soft-Start and In-Rush Current
      6. 8.1.6  Optimizing Noise and PSRR
      7. 8.1.7  Charge Pump Noise
      8. 8.1.8  ANY-OUT Programmable Output Voltage
      9. 8.1.9  ANY-OUT Operation
      10. 8.1.10 Increasing ANY-OUT Resolution for LILO Conditions
      11. 8.1.11 Current Sharing
      12. 8.1.12 Adjustable Operation
      13. 8.1.13 Sequencing Requirements
        1. 8.1.13.1 Sequencing with a Power-Good DC-DC Converter Pin
        2. 8.1.13.2 Sequencing with a Microcontroller (MCU)
      14. 8.1.14 Power-Good Operation
      15. 8.1.15 Undervoltage Lockout (UVLO) Operation
      16. 8.1.16 Dropout Voltage (VDO)
      17. 8.1.17 Behavior when Transitioning from Dropout into Regulation
      18. 8.1.18 Load Transient Response
      19. 8.1.19 Negatively-Biased Output
      20. 8.1.20 Reverse Current Protection
      21. 8.1.21 Power Dissipation (PD)
      22. 8.1.22 Estimating Junction Temperature
      23. 8.1.23 Recommended Area for Continuous Operation (RACO)
    2. 8.2 Typical Applications
      1. 8.2.1 Low-Input, Low-Output (LILO) Voltage Conditions
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application for a 5.0-V Rail
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.6 Optimizing Noise and PSRR

The ultra-low noise floor and PSRR of the device can be improved by careful selection of:

  • CNR/SS for the low-frequency range
  • CFF in the mid-band frequency range
  • COUT for the high-frequency range
  • VIN – VOUT for all frequencies, and
  • VBIAS at lower input voltages

A larger noise-reduction capacitor improves low-frequency PSRR by filtering any noise coupling from the input into the reference. The feed-forward capacitor can be optimized to place a pole-zero pair near the edge of the loop bandwidth and push out the loop bandwidth, thus improving mid-band PSRR. Larger output capacitors and various output capacitors can be used to improve high-frequency PSRR.

A higher input voltage improves the PSRR by giving the device more headroom to respond to noise on the input; see the Figure 6-2 curve. A bias rail also improves the PSRR at lower input voltages because greater headroom is provided for the internal circuits.

The noise-reduction capacitor filters out low-frequency noise from the reference and the feed-forward capacitor reduces output voltage noise by filtering out the mid-band frequency noise. However, a large feed-forward capacitor can create some new issues that are discussed in the Pros and Cons of Using a Feed-Forward Capacitor with a Low Dropout Regulator application report.

A large output capacitor reduces high-frequency output voltage noise. Additionally, a bias rail or higher input voltage improves the noise because greater headroom is provided for the internal circuits.

Table 8-1 lists the output voltage noise for the 10-Hz to 100-kHz band at a 5.0-V output for a variety of conditions with an input voltage of 5.4 V, an R1 of 12.1 kΩ, and a load current of 3 A. The 5.0-V output is chosen because this output is the worst-case condition for output voltage noise.

Table 8-1 Output Noise Voltage at a 5.0-V Output
OUTPUT VOLTAGE NOISE (µVRMS) CNR/SS (nF) CFF (nF) COUT (µF)
11.7 10 10 47 || 10 || 10
7.7 100 10 47 || 10 || 10
6 100 100 47 || 10 || 10
7.4 100 10 1000
5.8 100 100 1000