SLVSD43C May 2015 – February 2019 TPS7B68-Q1
PRODUCTION DATA.
For this design example, use the parameters listed in Table 3.
DESIGN PARAMETER | EXAMPLE VALUES |
---|---|
Input voltage range | 4 V to 40 V for TPS7B6833-Q1
5.6 V to 40 V for TPS7B6850-Q1 |
Input capacitor range | 10 μF to 22 μF |
Output voltage | 3.3 V, 5 V |
Output current rating | 500 mA maximum |
Output capacitor range | 4.7 μF to 500 μF |
Power-good threshold | Adjustable or fixed |
Power-good delay capacitor | 100 pF to 100 nF |
Watchdog type | Standard watchdog or window watchdog |
Watchdog window periods | 10 ms to 500 ms |