SLVSDQ0J
september 2017 – august 2023
TPS7B82-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: Grade 1 Options
6.6
Electrical Characteristics: Grade 0 Options
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Device Enable (EN)
7.3.2
Undervoltage Shutdown
7.3.3
Current Limit
7.3.4
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Operation With VIN Lower Than 3 V
7.4.2
Operation With VIN Larger Than 3 V
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Input Capacitor
8.2.2.2
Output Capacitor
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PWP|14
MPDS370A
DRV|6
MPDS216E
DGN|8
MPDS046G
KVU|5
MPSF019
Thermal pad, mechanical data (Package|Pins)
PWP|14
PPTD393
DRV|6
QFND087M
DGN|8
PPTD362A
KVU|5
QFND405
Orderable Information
slvsdq0j_oa
slvsdq0j_pm
9
Device and Documentation Support