SBVS361A April   2020  – November 2020 TPS7B84-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Undervoltage Lockout
      3. 7.3.3 Thermal Shutdown
      4. 7.3.4 Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Selection
      2. 8.1.2 Adjustable Device Feedback Resistor Selection
      3. 8.1.3 Feed-Forward Capacitor (CFF)
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Reverse Current
      6. 8.1.6 Power Dissipation (PD)
        1. 8.1.6.1 Thermal Performance Versus Copper Area
        2. 8.1.6.2 Power Dissipation vs Ambient Temperature
      7. 8.1.7 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Package Mounting
      2. 10.1.2 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCY|4
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) (2) TPS7B84-Q1 Unit
DRB (VSON) DCY
8 PINS 4 PINS
RθJA Junction-to-ambient thermal resistance(3) 50.8 85.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 55.6 46.6 °C/W
RθJB Junction-to-board thermal resistance 22.9 11.3 °C/W
ψJT Junction-to-top characterization parameter 1.2 4.9 °C/W
ψJB Junction-to-board characterization parameter 22.9 11 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 7.5 11 °C/W
(1) The thermal data is based on the JEDEC standard high K profile,JESD 51-7. Two-signal, two-plane, four-layer board with 2-oz. copper. The copper pad is soldered tothe thermal land pattern. Also, correct attachment procedure must be incorporated.
(2) For more information about traditional and new thermal metrics,see the Semiconductor and IC PackageThermal Metrics application report.
(3) The 1s0p RθJA is 212.7℃/W for the DRB package and 168.8℃/W for the DCY package.