SLVSI35A September   2024  – December 2024 TPS7C84-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Reverse Current
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Estimating Junction Temperature
      4. 7.1.4 Power Dissipation (PD)
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Recommended Capacitor Types
          1. 7.2.1.1.1 Recommended Capacitors
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Feedback Resistor Selection
        2. 7.2.2.2 Feedforward Capacitor
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

specified at TJ = –40°C to +150°C, at VIN = VOUT (nominal) + 1V, IOUT = 100 μA, COUT = 2.2μF, VEN ≥ 2V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOUT Output voltage accuracy VIN = [VOUT(NOM) + 1V] to 40V, IOUT = 100µA to 150mA TJ = 25°C –0.5 0.5 %
TJ = –40°C to 150°C –1 1
ΔVOUT(ΔVIN) Line regulation VIN = [VOUT(NOM) + 1V] to 40V TJ = –40°C to 150°C 0.0004 0.01 %/V
ΔVOUT(ΔIOUT) Load regulation IOUT = 100 µA to 150mA TJ = –40°C to 150°C 0.02 0.2 %
VFB Feedback voltage Reference voltage for FB TJ = –40°C to 150°C -1 1 %
IFB FEEDBACK bias current TJ = 25°C 2 10 nA
TJ = –40°C to 150°C 15
VDO Dropout voltage adjustable output VIN = 3.5V, IOUT = 150mA TJ = –40°C to 150°C 350 660 mV
Dropout voltage fixed 3.3V output VIN= VOUT (nominal)= 3.3V, IOUT = 150mA 670
Dropout voltage fixed 5V output VIN= VOUT (nominal)= 5V, IOUT = 150mA 580
IQ Quiescent current IOUT = 0 TJ = –40°C to 150°C 56 µA
IOUT = 100µA 45 68
IOUT = 150mA 1.15 mA
UVLO UVLO VIN rising IOUT = 100µA TJ = –40°C to 150°C 1.8 1.9 2.0 V
UVLO VIN falling 1.7 1.8 1.9
Hysteresis 100 mV
VIL Enable logic input low level Low (regulator OFF) TJ = –40°C to 150°C 0.7 V
VIH Enable logic input high level High (regulator ON) 1.9
IEN EN pin current VEN = 40V TJ = –40°C to 150°C 0.8 µA
ICL Current limit VIN ≥ 3V, VOUT = 0V TJ = –40°C to 150°C 165 235 280 mA
Vn Output noise (RMS),
10Hz to 100KHz		 COUT = 1µF TJ = 25°C 265 µVrms
PSRR Power supply ripple rejection VIN - VOUT = 1V, frequency = 100Hz, IOUT = 5mA TJ = 25°C 80 dB
VPG(OL) PG pin low level output voltage VIN ≥ 2V, IOL = 400μA TJ = 25°C 180 230 mV
TJ = –40°C to 150°C 280
VPG(TH,RISING) VOUT rising TJ = –40°C to 150°C 97 %VOUT
VPG(TH,FALLING) VOUT falling 92
VPG(HYST) Hysteresis TJ = 25°C 2
ISHUTDOWN Shutdown supply current (IGND) VEN ≤ 0.7V, VIN ≤ 40V, VOUT = 0V TJ = 25°C 3 4.5 µA
TJ = –40°C to 150°C 6
TSD(SHUTDOWN) Junction shutdown temperature 177 °C
TSD(HYST) Hysteresis of thermal shutdown 15 °C