SLVSD81A January   2016  – February 2017 TPS7H1101-SP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Soft Start
      2. 8.3.2 Power Good (PG)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable/Disable
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Stability
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Adjustable Output Voltage (Feedback Circuit)
        2. 9.2.2.2 PCL
        3. 9.2.2.3 High-Side Current Sense
        4. 9.2.2.4 Current Foldback
        5. 9.2.2.5 Transient Response
        6. 9.2.2.6 Current Sharing
        7. 9.2.2.7 Compensation
        8. 9.2.2.8 Output Noise
        9. 9.2.2.9 Capacitors
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Device Nomenclature

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage VIN, PG –0.3 7.5 V
FB, COMP, PCL, CS, EN –0.3 VIN + 0.3 V
Output voltage VOUT, SS –0.3 7.5 V
PG terminal sink current 0.001 5 mA
Maximum operating junction temperature, TJ –55 150 °C
Storage temperature, Tstg –55 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
TJ Operating junction temperature –55 125 °C
tR EN Rise time (10% to 90%) for EN signal 100 µs
tR VIN Rise time (10% to 90%) for VIN = EN 1 ms

Thermal Information

THERMAL METRIC(1)(2) TPS7H1101-SP UNIT
HKR (CFP)
16 PINS
RθJC(bot) Junction-to-case (bottom) thermal resistance 0.6 °C/W
Do not allow package body temperature to exceed 265°C at any time or permanent damage may result.
Maximum power dissipation may be limited by overcurrent protection.

Electrical Characteristics

1.5 V ≤ VIN ≤ 7 V, VOUT(target) = VIN – 0.35 V, IOUT = 10 mA, VEN = 1.1 V, COUT = 22 µF, PG terminal pulled up to VIN with 50 kΩ, over operating temperature range (TJ = –55°C to 125°C), unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 1.5 7 V
VFB Feedback terminal voltage(2) 0 A ≤ IOUT ≤ 3 A, 1.5 V ≤ VIN ≤ 7 V 0.594 0.605 0.616 V
VOUT Output voltage range 0.8 VIN V
Output voltage accuracy(2) 0 A ≤ IOUT ≤ 3 A, 1.5 V ≤ VIN ≤ 7 V,
VOUT = 0.8 V, 1.2 V, 1.8 V, 6.65 V
–2% 2%
ΔVOUT%/
ΔVIN
Line regulation 1.5 V ≤ VIN ≤ 7 V -0.07 0.01 0.07 %/V
ΔVOUT%/
ΔIOUT
Load regulation 0.8 V ≤ VOUT ≤ 6.65 V, 0 ≤ ILoad ≤ 3 A 0.08 %/A
ΔVOUT DC input line regulation 1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, 1.2 V, 1.8 V,
IOUT = 10 mA, TJ = –55°C(1)
0.5 3 mV
1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, 1.2 V, 1.8 V,
IOUT = 10 mA, TJ = 25°C(1)
0.2 0.6
1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, 1.2 V, 1.8 V,
IOUT = 10 mA, TJ = 125°C(1)
0.2 1.0
ΔVO DC output load regulation(3) VOUT = 0.8 V, 0 ≤ ILoad ≤ 1 A, TJ = –55°C(1) 0.4 1.0 mV
VOUT = 0.8 V, 0 ≤ ILoad ≤ 1 A, TJ = 25°C(1) 0.6 1.1
VOUT = 0.8 V, 0 ≤ ILoad ≤ 1 A, TJ = 125°C(1) 0.8 1.3
VOUT = 0.8 V, 0 ≤ ILoad ≤ 2 A, TJ = –55°C(1) 0.8 1.8
VOUT = 0.8 V, 0 ≤ ILoad ≤ 2 A, TJ = 25°C(1) 1.3 1.8
VOUT = 0.8 V, 0 ≤ ILoad ≤ 2 A, TJ = 125°C(1) 1.6 2.4
VOUT = 0.8 V, 0 ≤ ILoad ≤ 3 A, TJ = –55°C(1) 1.1 1.9
VOUT = 0.8 V, 0 ≤ ILoad ≤ 3 A, TJ = 25°C(1) 1.9 2.6
VOUT = 0.8 V, 0 ≤ ILoad ≤ 3 A, TJ = 125°C(1) 2.5 3.4
VOUT = 1.2 V, 0 ≤ ILoad ≤ 1 A, TJ = –55°C(1) 0.3 1.2
VOUT = 1.2 V, 0 ≤ ILoad ≤ 1 A, TJ = 25°C(1) 0.5 1.3
VOUT = 1.2 V, 0 ≤ ILoad ≤ 1 A, TJ = 125°C(1) 0.6 1.3
VOUT = 1.2 V, 0 ≤ ILoad ≤ 2 A, TJ = –55°C(1) 0.8 1.6
VOUT = 1.2 V, 0 ≤ ILoad ≤ 2 A, TJ = 25°C(1) 1.1 2.1
VOUT = 1.2 V, 0 ≤ ILoad ≤ 2 A, TJ = 125°C(1) 1.5 2.1
VOUT = 1.2 V, 0 ≤ ILoad ≤ 3 A, TJ = –55°C(1) 1.0 1.7
VOUT = 1.2 V, 0 ≤ ILoad ≤ 3 A, TJ = 25°C(1) 1.1 2.4
VOUT = 1.2 V, 0 ≤ ILoad ≤ 3 A, TJ = 125°C(1) 2.2 3.5
VOUT = 1.8 V, 0 ≤ ILoad ≤ 1 A, TJ = –55°C(1) 0.1 0.9
VOUT = 1.8 V, 0 ≤ ILoad ≤ 1 A, TJ = 25°C(1) 0.3 0.9
VOUT = 1.8 V, 0 ≤ ILoad ≤ 1 A, TJ = 125°C(1) 0.4 1.2
VOUT = 1.8 V, 0 ≤ ILoad ≤ 2 A, TJ = –55°C(1) 1.4 2.4
VOUT = 1.8 V, 0 ≤ ILoad ≤ 2 A, TJ = 25°C(1) 0.7 1.4
VOUT = 1.8 V, 0 ≤ ILoad ≤ 2 A, TJ = 125°C(1) 0.6 1.9
VOUT = 1.8 V, 0 ≤ ILoad ≤ 3 A, TJ = –55°C(1) 2.5 3.9
VOUT = 1.8 V, 0 ≤ ILoad ≤ 3 A, TJ = 25°C(1) 1.2 2.1
VOUT = 1.8 V, 0 ≤ ILoad ≤ 3 A, TJ = 125°C(1) 1.2 2.5
VOUT = 6.65 V, 0 ≤ ILoad ≤ 1 A, TJ = –55°C(1) 1.5 2.9
VOUT = 6.65 V, 0 ≤ ILoad ≤ 1 A, TJ = 25°C(1) 0.4 2.6
VOUT = 6.65 V, 0 ≤ ILoad ≤ 1 A, TJ = 125°C(1) 2.8 3.5
VOUT = 6.65 V, 0 ≤ ILoad ≤ 2 A, TJ = –55°C(1) 3.5 5.9
VOUT = 6.65 V, 0 ≤ ILoad ≤ 2 A, TJ = 25°C(1) 1.1 4.7
VOUT = 6.65 V, 0 ≤ ILoad ≤ 2 A, TJ = 125°C(1) 5.8 8.0
VOUT = 6.65 V, 0 ≤ ILoad ≤ 3 A, TJ = –55°C(1) 5.6 9.3
VOUT = 6.65 V, 0 ≤ ILoad ≤ 3 A, TJ = 25°C(1) 3.7 8.0
VOUT = 6.65 V, 0 ≤ ILoad ≤ 3 A, TJ = 125°C(1) 13.0 25
VDO Dropout voltage(3) IOUT = 3 A, VOUT = 1.3 V, VIN = VOUT + VDO 210 335 mV
ICL Programmable output current limit range VIN = 1.5 V, VOUT = 1.2 V , PCL resistance = 47 kΩ 500 750 mA
VIN = 1.5 V, VOUT = 1.2 V , PCL resistance varies 200 3500(5)
VCS Operating voltage range at CS 0.3 VIN V
CSR Current sense ratio ILOAD / ICS, VIN = 2.3 V, VOUT = 1.9 V 47394 47500 56000 A/A
IGND GND terminal current VIN = 1.5 V, VOUT = 1.2 V, IOUT = 2 A 10 16 mA
IQ Quiescent current (no load) VIN = VOUT + 0.5 V, IOUT = 0 A 7 10 mA
ISHDN Shutdown current 1.5 V ≤ VIN ≤ 7 V 26 230 µA
1.5 V ≤ VIN ≤ 7 V, post 100 kRads (si), TJ = 25°C(4) 1400 µA
ISNS, IFB FB/SNS terminal current VIN = 7 V, VOUT = 6.65 V 1 5 nA
IEN EN terminal input current VIN = 7 V, VEN = 7 V, VOUT = 6.65 V 20 150 nA
VILEN EN terminal input low (disable) 3.5 V < VIN < 7 V 0.30 × VIN V
VIHEN EN terminal input high (enable) 3.5 V < VIN < 7 V 0.75 × VIN V
Eprop Dly Enable terminal propagation delay VIN = 2.2 V, EN rise to IOUTrise 650 1000 µs
TEN Enable terminal turn-on delay VIN = 2.2 V, VOUT = 1.8 V, ILOAD = 1 A,
COUT = 220 µF, CSS = 2 nF
1.4 1.6 ms
VTHPG PG threshold No load, 0.8 V ≤ VOUT ≤ 6.65 V 86% 90%
VTHPGHYS PG hysteresis 1.5 V ≤ VIN ≤ 7 V 2%
VOLPG PG terminal output low IPG = –1 mA to 0 mA 120 300 mV
ILKGPG PG terminal leakage current VOUT > VTHPG, VPG = 1.2 V 0.2 1.5 µA
VOUT > VTHPG, VPG = 7 V 0.5 2.5
ISS SS terminal charge current VIN = 1.5 V to 7 V 2.5 3.5 µA
ISSdisb SS terminal disable current VIN = 1.5 V to 7 V 5 10 µA
VSS SS terminal voltage (device enabled)(6) VIN = 1.5 V to 7 V 1.232 V
VSSdisb SS terminal low-level input voltage to disable device VIN = 1.5 V to 7 V 0.4 V
PSRR Power-supply rejection ratio VIN = 2.5 V, VOUT = 1.8 V,
COUT = 220 µF
1 kHz 48 dB
100 kHz 25
VN Output noise voltage BW = 10 Hz to 100 kHz,
IOUT = 3 A, VIN = 2 V, VOUT = 1.8 V
20.33 µVRMS
TSD Thermal shutdown temperature 185 °C
Line and load regulations done under pulse condition for t < 10 ms.
The output voltage accuracy of condition at IOUT = 2 A and IOUT = 3 A is specified by characterization, but not production tested.
The parameter is specified to the limit in characterization, but not production tested.
This maximum limit applies to SMD 5962R13202 post 100 kRads (Si) test at 25°C.
The maximum limit of the ICLparameter is specified to the limit in characterization, but not production tested.
Any external pullup voltage should not exceed 1.188 V.

Typical Characteristics

TPS7H1101-SP C013a_lvsas4.gif
Figure 1. Feedback Voltage vs Temperature
TPS7H1101-SP C015_SLVSAS4.png
Figure 3. Ground Current vs Temperature
TPS7H1101-SP C017_SLVSAS4.gif
Figure 5. Shutdown Current vs Temperature
TPS7H1101-SP D001_SLVSAS4.gif
VIN = 2.5 V VOUT = 1.8 V
Figure 7. Power Supply Ripple Rejection vs Frequency
TPS7H1101-SP C014_SLVSAS4.png
Figure 2. Quiescent Current vs Temperature
TPS7H1101-SP C016b_lvsas4.gif
VOUT = 1.8 V Load = 3 A
Figure 4. Dropout Voltage vs Temperature
TPS7H1101-SP C018_SLVSAS4.gif
Figure 6. PG Threshold vs Temperature