SLVSFT8F February   2023  – December 2023 TPS7H1111-SEP , TPS7H1111-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Quality Conformance Inspection
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Bias Supply
      2. 8.3.2  Output Voltage Configuration
      3. 8.3.3  Output Voltage Configuration with a Voltage Source
      4. 8.3.4  Enable
      5. 8.3.5  Soft Start and Noise Reduction
      6. 8.3.6  Configurable Power Good
      7. 8.3.7  Current Limit
      8. 8.3.8  Stability
        1. 8.3.8.1 Output Capacitance
        2. 8.3.8.2 Compensation
      9. 8.3.9  Current Sharing
      10. 8.3.10 PSRR
      11. 8.3.11 Noise
      12. 8.3.12 Thermal Shutdown
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application 1: Set Turn-On Threshold with EN
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Bias Supply
          2. 9.2.1.2.2 Output Voltage Configuration
          3. 9.2.1.2.3 Output Voltage Accuracy
          4. 9.2.1.2.4 Enable Threshold
          5. 9.2.1.2.5 Soft Start and Noise Reduction
          6. 9.2.1.2.6 Configurable Power Good
          7. 9.2.1.2.7 Current Limit
          8. 9.2.1.2.8 Output Capacitor and Ferrite Bead
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Application 2: Parallel Operation
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Current Sharing
        3. 9.2.2.3 Application Results
    3. 9.3 Capacitors Tested
    4. 9.4 TID Effects
    5. 9.5 Power Supply Recommendations
    6. 9.6 Layout
      1. 9.6.1 Layout Guidelines
      2. 9.6.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Bias Supply

A bias supply connected to the BIAS pin is required for proper device operation. Depending on the headroom voltage and output current conditions, the bias supply voltage may be the same as the input voltage supply, or it may be a separate higher voltage supply. Note that headroom voltage is defined as the delta between the operating VIN and VOUT conditions (Vheadroom = VIN – VOUT). In all cases, there are no sequencing requirements between VBIAS and VIN.

As described in Table 8-1, if the headroom voltage is greater than or equal to 1.6 V, no separate higher bias supply is required. If the headroom voltage is less than 1.6 V, a separate higher bias supply voltage is required for full performance. In all situations shown in Table 8-1 it is possible to achieve the full 1.5 A of output current with the specified dropout voltage (see the Electrical Characteristics table).

Table 8-1 Bias Rail Requirements for Full Performance Operation
Headroom (VIN - VOUT) Bias Requirement(1)
≥ 1.6 V Use the same voltage rail as VIN or any VBIAS ≥ VIN
< 1.6 V Use a separate voltage rail than VIN where VBIAS ≥ VOUT + 1.6 V
(1) In all cases 2.2 V ≤ VBIAS ≤ 14 V

Table 8-2 shows examples of supported VBIAS, VIN, and VOUT combinations that can be achieved with standard voltage rails and result in full 1.5 A output current support. As can be seen, a 12 V bias supply will support all listed standard output voltage rails (generally a 5 V supply will also suffice). Also note that for the conditions where the VBIAS and VIN voltages are the same, a separate supply is not required.

Table 8-2 Bias Rail Standard Rail Examples for Full Performance Operation
VBIAS (V) VIN (V) VOUT (V)
12 5 3.3
5, 3.3 2.5
5, 3.3, 2.5 1.8
5, 3.3, 2.5, 1.8 1.1
5 5, 3.3 2.5
5, 3.3, 2.5 1.8
5, 3.3, 2.5, 1.8 1.1
3.3 3.3, 2.5, 1.8 1.1

While it is generally recommended to follow the above bias voltage requirements, sometimes it is not feasible (for example, if the headroom is small and a separate bias voltage rail is not available). In this case, it is still possible to operate the TPS7H1111 at the expense of reduced output current (and possibly reduced performance such as PSRR). This condition (where VBIAS = VIN and headroom is small) is specified as Dropout voltage with VBIAS = VIN in the Electrical Characteristics table. By meeting the resulting dropout voltage requirements, the part maintains proper operation.

An example of a supported combination that may not result in full performance capabilities is with VBIAS = VIN = 5 V and VOUT = 3.3 V. Assuming the 5 V rail has a 5% tolerance and the 3.3 V output has a specified maximum tolerance of +1.2% tolerance, the worst case headroom is Vheadroom = 4.75 - 3.34 = 1.41 V. This 1.41 V is less than the 1.6 V recommended. However, as shown in the Electrical Characteristics table, this headroom is greater than the dropout required at the full load current of 1.5 A. Therefore, it is expected that the full current will be supported, but other parameters may not be at full performance (such as PSRR).

Any noise on the bias rail will be attenuated by the PSRRBIAS specification before being coupled to the output. Unless the bias rail is an ultra-clean rail, this noise coupling would be the limiting factor in creating a clean output voltage. Therefore, an RC filter should be used to minimize noise input to the BIAS pin. This is feasible due to the low current requirements of the BIAS pin. A 10 Ω and 4.7 μF is generally sufficient to ensure the noise propagated from the BIAS pin to the output voltage is minimized. The selected resistor value must be low enough to ensure the resulting IR drop doesn't cause the bias voltage to become too low for proper operation.