SLVSEW6F August 2021 – March 2024 TPS7H2211-SEP , TPS7H2211-SP
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The TPS72211 eFuse features back to back FETs to prevent current flow from VIN to VOUT and from VOUT to VIN when the switch is disabled (excluding leakage currents). This supports cold sparing (redundancy) applications. For example, VOUT may be up to 14 V while VIN is between 0 V and 14 V. In all cases, only small leakage current will result.
Additionally, the eFuse features active reverse current protection when the switch is enabled. This protection feature is activated when VOUT rises above VIN by VRCP_ENTER (typically 363 mV at VIN = 14 V) which causes the switch to turn-off. After VRCP_ENTER is reached, it will take time, tRCP (typically 247 μs at VIN = 14 V) for the switch to turn off. Until the switch responds and turns off, there may be high reverse current through the switch. After this time, only a small amount of leakage current, IRCP, will result from VOUT to VIN (typically 40 μA). The switch will again be enabled after VOUT – VIN falls to less than or equal to VRCP_EXIT (typically 249 mV at VIN = 14 V).
The test waveforms for VRCP_ENTER and VRCP_EXIT can be found in Figure 8-1 and Figure 8-2 respectively.