SLVSGG1A February   2022  – September 2022 TPS7H5005-SEP , TPS7H5006-SEP , TPS7H5007-SEP , TPS7H5008-SEP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: All Devices
    6. 7.6  Electrical Characteristics: TPS7H5005-SEP
    7. 7.7  Electrical Characteristics: TPS7H5006-SEP
    8. 7.8  Electrical Characteristics: TPS7H5007-SEP
    9. 7.9  Electrical Characteristics: TPS7H5008-SEP
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VIN and VLDO
      2. 8.3.2  Start-Up
      3. 8.3.3  Enable and Undervoltage Lockout (UVLO)
      4. 8.3.4  Voltage Reference
      5. 8.3.5  Error Amplifier
      6. 8.3.6  Output Voltage Programming
      7. 8.3.7  Soft Start (SS)
      8. 8.3.8  Switching Frequency and External Synchronization
        1. 8.3.8.1 Internal Oscillator Mode
        2. 8.3.8.2 External Synchronization Mode
        3. 8.3.8.3 Primary-Secondary Mode
      9. 8.3.9  Primary Switching Outputs (OUTA/OUTB)
      10. 8.3.10 Synchronous Rectifier Outputs (SRA/SRB)
      11. 8.3.11 Dead Time and Leading Edge Blank Time Programmability (PS, SP, and LEB)
      12. 8.3.12 Pulse Skipping
      13. 8.3.13 Duty Cycle Programmability
      14. 8.3.14 Current Sense and PWM Generation (CS_ILIM)
      15. 8.3.15 Hiccup Mode Operation (HICC)
      16. 8.3.16 External Fault Protection (FAULT)
      17. 8.3.17 Slope Compensation (RSC)
      18. 8.3.18 Frequency Compensation
      19. 8.3.19 Thermal Shutdown
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Switching Frequency
        2. 9.2.2.2  Output Voltage Programming Resistors
        3. 9.2.2.3  Dead Time
        4. 9.2.2.4  Leading Edge Blank Time
        5. 9.2.2.5  Soft-Start Capacitor
        6. 9.2.2.6  Transformer
        7. 9.2.2.7  Main Switching FETs
        8. 9.2.2.8  Synchronous Rectificier FETs
        9. 9.2.2.9  RCD Clamp
        10. 9.2.2.10 Output Inductor
        11. 9.2.2.11 Output Capacitance and Filter
        12. 9.2.2.12 Sense Resistor
        13. 9.2.2.13 Hiccup Capacitor
        14. 9.2.2.14 Frequency Compensation Components
        15. 9.2.2.15 Slope Compensation Resistor
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.14 Current Sense and PWM Generation (CS_ILIM)

The CS_ILIM pin is driven by a signal representative of the transformer primary-side current. The current signal has to have compatible input range of the COMP pin. As shown in Figure 8-14, the COMP pin voltage is used as the reference for the peak current. Note that the OUTB waveform is only applicable for TPS7H5005-SEP and TPS7H5008-SEP. The primary side signals, OUTA/OUTB, are turned on by the internal clock signal and turned off when sensed peak current reaches the COMP/2 pin voltage. Note that this peak sensed current signal that is compared to COMP/2 at the PWM comparator contains an offset voltage of 150 mV. The CS_ILIM pin is also used to configure the current limit for the controller.

GUID-9DE7B59A-B8F7-4D1D-8C04-B4D3561BD5B2-low.pngFigure 8-14 Peak Current Mode Control and PWM Generation

A resistor is needed from CS_ILIM to AVSS is used to detect current for both proper PWM operation and overcurrent protection. The current limit threshold VCS_ILIM, is specified as 1.05 V (nominal) in the electrical specifications. This indicates that when the voltage on this pin reaches this threshold, the device will go into hiccup mode. Equation 10 shows the calculation for determining the value of the sense resistor for a selected current limit.

Equation 10.

Note that the value of ILIM has to account for where and how the current is being sensed. For a forward converter with sense resistor between source of primary FET to AVSS, ILIM will be referred to the primary side of the converter.

Equation 11.

Equation 11 shows the calculation for determining ILIM in the design of a forward converter, where:

  • IL,PEAK is the peak output inductor current desired to activate the overcurrent protection
  • NS is the number of secondary turns for the power transformer
  • NP is the number of primary turns for the power transformer

In the design of a buck converter which senses the high side current via a current sense transformer, Equation 12 can be used for determining ILIM for this instance.

Equation 12.

In this equation:

  • IL,PEAK is the peak output inductor current desired to activate the overcurrent protection
  • NCSP is the number of primary turns of the current sense transformer
  • NCSS is the number of secondary turns of the current sense transformer

Regardless of the topology, the user should ensure that there is sufficient margin between the peak current during normal operation and the overcurrent trip point when determining the value of RCS.