SLVSCY5F February   2016  – January 2023 TPS82130

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM and PSM Operation
      2. 7.3.2 Low Dropout Operation (100% Duty Cycle)
      3. 7.3.3 Switch Current Limit
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Soft Start-Up (SS/TR)
      3. 7.4.3 Voltage Tracking (SS/TR)
      4. 7.4.4 Power-Good Output (PG)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1.8-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2 Setting the Output Voltage
          3. 8.2.1.2.3 Input and Output Capacitor Selection
          4. 8.2.1.2.4 Soft Start-Up Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Consideration
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Third-Party Products Disclaimer
        2. 9.1.1.2 Custom Design with WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Glossary
    7. 9.7 Electrostatic Discharge Caution
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • SIL|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 PWM and PSM Operation

The TPS82130 includes an on-time (tON) circuitry. tON, in steady-state operation in PWM and PSM modes, is estimated as:

Equation 1. GUID-5BD52195-E196-4E6D-9B9E-D8D35A320610-low.gif

In PWM mode, the TPS82130 operates with pulse width modulation in continuous conduction mode (CCM) with a tON shown in Equation 1 at medium and heavy load currents. A PWM switching frequency of typically 2.0 MHz is achieved by this tON circuitry. The device operates in PWM mode as long as the output current is higher than half of the ripple current of the inductor estimated by Equation 2.

Equation 2. GUID-FEC16FB4-5D36-4CDA-903A-4F931B48610F-low.gif

To maintain high efficiency at light loads, the device enters power save mode seamlessly when the load current decreases. This happens when the load current becomes smaller than half of the ripple current of the inductor. In PSM, the converter operates with reduced switching frequency and with a minimum quiescent current to maintain high efficiency. PSM is also based on the tON circuitry. The switching frequency in PSM is estimated as:

Equation 3. GUID-C471F8F6-9384-469F-B781-DC3C25382065-low.gif

In PSM, the output voltage rises slightly above the nominal output voltage in PWM mode. This effect is reduced by increasing the output capacitance. The output voltage accuracy in PSM operation is reflected in Section 6.5 and given for a 22-µF output capacitor.

For very small output voltages, an absolute minimum on time of approximately 80 ns is kept to limit switching losses. The operating frequency is thereby reduced from its nominal value, which keeps efficiency high. Also, the off time can reach its minimum value at high duty cycles. The output voltage remains regulated in such cases.

When VIN decreases to typically 15% above VOUT, the TPS82130 cannot enter power save mode, regardless of the load current. The device maintains output regulation in PWM mode.