Connecting the IADJ pin directly to VCC is simple and is the most accurate stand-alone implementation.
Using a resistor divider circuit can lower the sense voltage and improve efficiency if the converter output currents are high. The trade-off is an increased variation in the peak trip voltage. Note that there are also practical limitations to how low the sense voltage can be and maintain a reasonable accuracy.
The simple thermal foldback method sizes the divider to set the IADJ voltage above 2.4 V. This method uses the internal clamp when thermal foldback is not required and sets the IADJ voltage below 2.4 V when foldback is required. Match the temperature characteristic of the thermistor to the second resistor in the divider. As an alternative, use a positive temperature coefficient (PTC) thermistor as the upper resistor in the divider.
By using a micro-controller to control the timing output, the duty cycle can be controlled and the voltage can be filtered and connected to the IADJ pin. Use a filter pole of 1/10th the micro-controller control pin output switching frequency, or use R ≈ 1 kΩ and C ≈ 4.7 µF as a starting point.
Simply add a capacitor to the IADJ pin and size the R-C constant to produce the desired soft-start time. Consider the maximum current is reached when VIADJ = 2.4 V.
To get the highest accuracy, use an external, high-precision reference and power it from the TPS92515AHV-Q1 VCC if required. A 1% or 2% Zener diode, TL431 device, or an existing precision reference circuit can be used.