SLVSGW5A November   2022  – January 2024 TPS92620-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Power Supply (SUPPLY)
        1. 6.3.1.1 Power-On Reset (POR)
        2. 6.3.1.2 Suppply Current in Fault Mode
      2. 6.3.2  Enable and Shutdow(EN)
      3. 6.3.3  Constant-Current Output and Setting (INx)
      4. 6.3.4  Thermal Sharing Resistor (OUTx and RESx)
      5. 6.3.5  PWM Control (PWMx)
      6. 6.3.6  Supply Control
      7. 6.3.7  Diagnostics
        1. 6.3.7.1 LED Short-to-GND Detection
        2. 6.3.7.2 LED Open-Circuit Detection
        3. 6.3.7.3 LED Open-Circuit Detection Enable (DIAGEN)
        4. 6.3.7.4 Overtemperature Protection
        5. 6.3.7.5 Low Dropout Operation
      8. 6.3.8  FAULT Bus Output With One-Fails-All-Fail
      9. 6.3.9  FAULT Table
      10. 6.3.10 LED Fault Summary
      11. 6.3.11 IO Pins Inner Connection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Undervoltage Lockout, V(SUPPLY) < V(POR_rising)
      2. 6.4.2 Normal Operation V(SUPPLY) ≥ 4.5V
      3. 6.4.3 Low-Voltage Dropout Operation
      4. 6.4.4 Fault Mode
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 BCM Controlled Rear Lamp With One-Fails-All-Fail Setup
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Independent PWM Controlled Rear Lamp By MCU
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

Thermal dissipation is the primary consideration for TPS92620-Q1 layout.

  • TI recommends large thermal dissipation area in both top and bottom layers of PCB. The copper pouring area in same layer with TPS92620-Q1-Q1 footprint must directly cover the thermal pad land of the device with wide connection as much as possible. The copper pouring in opposite PCB layer or inner layers must be connected to thermal pad directly through multiple thermal vias.
  • TI recommends to place R(RESx) resistors away from the TPS92620-Q1 device with more than 20-mm distance, because R(RESx) resistors are dissipating some amount of the power as well as the TPS92620-Q1. Place two heat source components apart to reduce the thermal accumulation concentrated at small PCB area. The large copper pouring area is also required surrounding the R(RESx) resistors for helping thermal dissipating.

The noise immunity is the secondary consideration for TPS92620-Q1 layout.

  • TI recommends to place the noise decoupling capacitors for SUPPLY pin as close as possible to the pins.
  • TI recommends to place the R(SNSx) resistor as close as possible to the INx pins with the shortest PCB track to SUPPLY pin.